[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Nate Begeman]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.86 -> 1.87
---
Log message:

Add a missing case to the dag combiner.


---
Diffs of the changes:  (+3 -2)

 DAGCombiner.cpp |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.86 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.87
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.86	Sun Jan 22 17:39:54 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Fri Jan 27 19:06:30 2006
@@ -1035,9 +1035,10 @@
     WorkList.push_back(ANDNode.Val);
     return DAG.getNode(ISD::ZERO_EXTEND, VT, ANDNode);
   }
-  // fold (and (shl/srl x), (shl/srl y)) -> (shl/srl (and x, y))
+  // fold (and (shl/srl/sra x), (shl/srl/sra y)) -> (shl/srl/sra (and x, y))
   if (((N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SHL) ||
-       (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SRL)) &&
+       (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SRL) ||
+       (N0.getOpcode() == ISD::SRA && N1.getOpcode() == ISD::SRA)) &&
       N0.getOperand(1) == N1.getOperand(1)) {
     SDOperand ANDNode = DAG.getNode(ISD::AND, N0.getOperand(0).getValueType(),
                                     N0.getOperand(0), N1.getOperand(0));