[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp PPCISelLowering.cpp PPCISelLowering.h

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelDAGToDAG.cpp updated: 1.152 -> 1.153
PPCISelLowering.cpp updated: 1.73 -> 1.74
PPCISelLowering.h updated: 1.17 -> 1.18
---
Log message:

Use PPCISD::CALL instead of ISD::CALL


---
Diffs of the changes:  (+11 -6)

 PPCISelDAGToDAG.cpp |    3 +--
 PPCISelLowering.cpp |    9 ++++++---
 PPCISelLowering.h   |    5 ++++-
 3 files changed, 11 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.152 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.153
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.152	Sun Jan 22 17:37:17 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp	Fri Jan 27 17:34:02 2006
@@ -821,8 +821,7 @@
   case ISD::ADD_PARTS:          return SelectADD_PARTS(Op);
   case ISD::SUB_PARTS:          return SelectSUB_PARTS(Op);
   case ISD::SETCC:              return SelectSETCC(Op);
-  case ISD::CALL:               return SelectCALL(Op);
-  case ISD::TAILCALL:           return SelectCALL(Op);
+  case PPCISD::CALL:            return SelectCALL(Op);
   case PPCISD::GlobalBaseReg:   return getGlobalBaseReg();
     
   case ISD::FrameIndex: {


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.73 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.74
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.73	Fri Jan 27 16:25:06 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Fri Jan 27 17:34:02 2006
@@ -666,7 +666,7 @@
                                unsigned CallingConv, bool isTailCall,
                                SDOperand Callee, ArgListTy &Args,
                                SelectionDAG &DAG) {
-  // args_to_use will accumulate outgoing args for the ISD::CALL case in
+  // args_to_use will accumulate outgoing args for the PPCISD::CALL case in
   // SelectExpr to use to put the arguments in the appropriate registers.
   std::vector<SDOperand> args_to_use;
   
@@ -844,8 +844,11 @@
   if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
     Callee = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i32);
   
-  SDOperand TheCall = SDOperand(DAG.getCall(RetVals,
-                                            Chain, Callee, args_to_use), 0);
+  std::vector<SDOperand> Ops;
+  Ops.push_back(Chain);
+  Ops.push_back(Callee);
+  Ops.insert(Ops.end(), args_to_use.begin(), args_to_use.end());
+  SDOperand TheCall = DAG.getNode(PPCISD::CALL, RetVals, Ops);
   Chain = TheCall.getValue(RetTyVT != MVT::isVoid);
   Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain,
                       DAG.getConstant(NumBytes, getPointerTy()));


Index: llvm/lib/Target/PowerPC/PPCISelLowering.h
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.17 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.18
--- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.17	Fri Jan 27 16:25:06 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.h	Fri Jan 27 17:34:02 2006
@@ -59,9 +59,12 @@
       /// code.
       SRL, SRA, SHL,
 
+      /// CALL - A function call.
+      CALL,
+      
       /// Return with a flag operand, matched by 'blr'
       RET_FLAG,
-};
+    };
   }  
   
   class PPCTargetLowering : public TargetLowering {