[llvm-commits] CVS: llvm/lib/Target/IA64/IA64.td IA64InstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/IA64:

IA64.td updated: 1.6 -> 1.7
IA64InstrInfo.td updated: 1.44 -> 1.45
---
Log message:

PHI and INLINEASM are now built-in instructions provided by Target.td


---
Diffs of the changes:  (+1 -4)

 IA64.td          |    4 +---
 IA64InstrInfo.td |    1 -
 2 files changed, 1 insertion(+), 4 deletions(-)


Index: llvm/lib/Target/IA64/IA64.td
diff -u llvm/lib/Target/IA64/IA64.td:1.6 llvm/lib/Target/IA64/IA64.td:1.7
--- llvm/lib/Target/IA64/IA64.td:1.6	Mon Jan 23 00:11:45 2006
+++ llvm/lib/Target/IA64/IA64.td	Thu Jan 26 19:46:15 2006
@@ -28,9 +28,7 @@
 
 include "IA64InstrInfo.td"
 
-def IA64InstrInfo : InstrInfo {
-    let PHIInst = PHI;
-}
+def IA64InstrInfo : InstrInfo { }
 
 def IA64 : Target {
   // The following registers are always saved across calls:


Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.44 llvm/lib/Target/IA64/IA64InstrInfo.td:1.45
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.44	Thu Jan 26 03:08:31 2006
+++ llvm/lib/Target/IA64/IA64InstrInfo.td	Thu Jan 26 19:46:15 2006
@@ -448,7 +448,6 @@
 // TODO: support postincrement (reg, imm9) loads+stores - this needs more
 // tablegen support
 
-def PHI : PseudoInstIA64<(ops variable_ops), "PHI">;
 def IDEF : PseudoInstIA64<(ops variable_ops), "// IDEF">;
 
 def IDEF_GR_D : PseudoInstIA64_DAG<(ops GR:$reg), "// $reg = IDEF",