[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp

[Evan Cheng]

Changes in directory llvm/utils/TableGen:

DAGISelEmitter.cpp updated: 1.136 -> 1.137
---
Log message:

Use pattern information to determine whether the use expects this
instruction to produce a result. e.g MUL8m, the instruction does not
produce a explicit result. However it produces an implicit result in
AL which would be copied to a temp. The root operator of the matching
pattern is a mul so the use would expect it to produce a result.


---
Diffs of the changes:  (+5 -2)

 DAGISelEmitter.cpp |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.136 llvm/utils/TableGen/DAGISelEmitter.cpp:1.137
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.136	Wed Jan 18 19:55:45 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Thu Jan 19 04:12:58 2006
@@ -2255,10 +2255,13 @@
           OS << "      CodeGenMap[N.getValue(" << ValNo << ")] = InFlag;\n";
 
         if (AddedChain && HasOutFlag) {
-          if (NumResults == 0) {
+          // Is this pattern expected to produce a result?
+          if (Pattern->getTypeNum(0) == MVT::isVoid ||
+              Pattern->getTypeNum(0) == MVT::Flag) {
             OS << "      return Result.getValue(N.ResNo+1);\n";
           } else {
-            OS << "      if (N.ResNo < " << NumResults << ")\n";
+            OS << "      if (N.ResNo < "
+               << ((NumResults > 1) ? NumResults : 1) << ")\n";
             OS << "        return Result.getValue(N.ResNo);\n";
             OS << "      else\n";
             OS << "        return Result.getValue(N.ResNo+1);\n";