[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.39 -> 1.40
---
Log message:

LHS = X86ISD::CMOVcc LHS, RHS  means LHS = RHS if cc. So the operands must be
flipped around.


---
Diffs of the changes:  (+4 -2)

 X86ISelLowering.cpp |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.39 llvm/lib/Target/X86/X86ISelLowering.cpp:1.40
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.39	Fri Jan 13 12:00:54 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Fri Jan 13 13:51:46 2006
@@ -1606,7 +1606,7 @@
       addTest = true;
 
     if (addTest) {
-      CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
+      CC = DAG.getConstant(X86ISD::COND_NE, MVT::i8);
       Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
     }
 
@@ -1614,8 +1614,10 @@
     Tys.push_back(Op.getValueType());
     Tys.push_back(MVT::Flag);
     std::vector<SDOperand> Ops;
-    Ops.push_back(Op.getOperand(1));
+    // X86ISD::CMOV means set the result (which is operand 1) to the RHS if
+    // condition is true.
     Ops.push_back(Op.getOperand(2));
+    Ops.push_back(Op.getOperand(1));
     Ops.push_back(CC);
     Ops.push_back(Cond);
     return DAG.getNode(X86ISD::CMOV, Tys, Ops);