[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Chris Lattner lattner at cs.uiuc.edu
Thu Jan 12 10:57:46 PST 2006



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.80 -> 1.81
---
Log message:

Don't create rotate instructions in unsupported types, because we don't have
promote/expand code yet.  This fixes the 177.mesa failure on PPC.


---
Diffs of the changes:  (+2 -2)

 DAGCombiner.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.81
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80	Wed Jan 11 15:21:00 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Thu Jan 12 12:57:33 2006
@@ -1184,7 +1184,7 @@
   // check for rotl, rotr
   if (N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SRL &&
       N0.getOperand(0) == N1.getOperand(0) &&
-      TLI.isOperationLegal(ISD::ROTL, VT)) {
+      TLI.isOperationLegal(ISD::ROTL, VT) && TLI.isTypeLegal(VT)) {
     // fold (or (shl x, C1), (srl x, C2)) -> (rotl x, C1)
     if (N0.getOperand(1).getOpcode() == ISD::Constant &&
         N1.getOperand(1).getOpcode() == ISD::Constant) {
@@ -1206,7 +1206,7 @@
       if (ConstantSDNode *SUBC = 
           dyn_cast<ConstantSDNode>(N0.getOperand(1).getOperand(0)))
         if (SUBC->getValue() == OpSizeInBits) {
-          if (TLI.isOperationLegal(ISD::ROTR, VT))
+          if (TLI.isOperationLegal(ISD::ROTR, VT) && TLI.isTypeLegal(VT))
             return DAG.getNode(ISD::ROTR, VT, N0.getOperand(0), 
                                N1.getOperand(1));
           else






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