[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.41 -> 1.42
---
Log message:

Fix a bug in i32->f64 conversion lowering


---
Diffs of the changes:  (+2 -2)

 SparcV8ISelDAGToDAG.cpp |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.41 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.42
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.41	Fri Jan  6 11:56:17 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Wed Jan 11 01:27:40 2006
@@ -622,9 +622,9 @@
     return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);
   case ISD::SINT_TO_FP: {
     assert(Op.getOperand(0).getValueType() == MVT::i32);
-    Op = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
+    SDOperand Tmp = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
     // Convert the int value to FP in an FP register.
-    return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Op);
+    return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Tmp);
   }
   case ISD::BR_CC: {
     SDOperand Chain = Op.getOperand(0);