[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp

[Duraid Madina]

Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.14 -> 1.15
---
Log message:

we can't do this directly in lowering, so we need this case



---
Diffs of the changes:  (+8 -0)

 IA64ISelDAGToDAG.cpp |    8 ++++++++
 1 files changed, 8 insertions(+)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.14 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.15
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.14	Wed Dec 21 21:58:17 2005
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Thu Dec 22 01:14:45 2005
@@ -343,6 +343,14 @@
 
   case ISD::Register: return Op; // XXX: this is a hack, tblgen one day?
   
+  case IA64ISD::GETFD: {
+    SDOperand Input = Select(N->getOperand(0));
+    SDOperand Result = CurDAG->getTargetNode(IA64::GETFD, MVT::i64, MVT::Flag, Input);
+    CodeGenMap[Op.getValue(0)] = Result;
+    CodeGenMap[Op.getValue(1)] = Result.getValue(1);
+    return Result.getValue(Op.ResNo);
+  } 
+  
   case ISD::CALL:
   case ISD::TAILCALL: { {
         // FIXME: This is a workaround for a bug in tblgen.