[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp

[Duraid Madina]

Changes in directory llvm/lib/Target/IA64:

IA64ISelLowering.cpp updated: 1.6 -> 1.7
---
Log message:

this should take care of calls to varadic functions, but it doesn.,t
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce


---
Diffs of the changes:  (+14 -7)

 IA64ISelLowering.cpp |   21 ++++++++++++++-------
 1 files changed, 14 insertions(+), 7 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.6 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.7
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.6	Wed Dec 21 22:07:40 2005
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp	Thu Dec 22 00:39:57 2005
@@ -388,16 +388,22 @@
     InFlag = Chain.getValue(1);
 
     //FIXME: for performance, only do the following when required
-
+    
     // if we have just copied an FP arg, copy its in-memory representation
     // to the appropriate integer register
-/*    if(MVT::isFloatingPoint(RegValuesToPass[i].getValueType())) {
-      Chain = DAG.getTargetNode(IA64::GETFD, MVT::i64, RegValuesToPass[i], Chain, InFlag);
-      InFlag = Chain.getValue(0); // XXX
-      Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Chain, InFlag); // ...thrice!
+    if(MVT::isFloatingPoint(RegValuesToPass[i].getValueType())) {
+      std::vector<MVT::ValueType> GETFDRetTypes;
+      std::vector<SDOperand> GETFDOperands;
+      GETFDRetTypes.push_back(MVT::i64);
+      GETFDRetTypes.push_back(MVT::Flag);
+      GETFDOperands.push_back(RegValuesToPass[i]);
+      GETFDOperands.push_back(Chain);
+      GETFDOperands.push_back(InFlag);
+      
+      Chain = DAG.getNode(IA64ISD::GETFD, GETFDRetTypes, GETFDOperands);
+      Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Chain.getValue(0), Chain.getValue(1)); // ...thrice!
       InFlag = Chain.getValue(1);
-    } */
-
+    }
   }
 
   std::vector<MVT::ValueType> RetVals;
@@ -452,6 +458,7 @@
       RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext :ISD::AssertZext,
                            MVT::i64, RetVal, DAG.getValueType(RetTyVT));
       RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
+      break;
     case MVT::i64:
       RetVal = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
       Chain = RetVal.getValue(1);