[llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td

[Evan Cheng]

Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.31 -> 1.32
---
Log message:

Added X86 readport patterns.


---
Diffs of the changes:  (+5 -0)

 TargetSelectionDAG.td |    5 +++++
 1 files changed, 5 insertions(+)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.31 llvm/lib/Target/TargetSelectionDAG.td:1.32
--- llvm/lib/Target/TargetSelectionDAG.td:1.31	Mon Dec 19 17:12:38 2005
+++ llvm/lib/Target/TargetSelectionDAG.td	Tue Dec 20 01:38:38 2005
@@ -133,6 +133,10 @@
 
 def SDTRet : SDTypeProfile<0, 0, []>; // ret
 
+def SDTReadPort : SDTypeProfile<1, 1, [ // readport
+  SDTCisInt<0>, SDTCisInt<1>
+]>;
+
 def SDTWritePort : SDTypeProfile<0, 2, [ // writeport
   SDTCisInt<0>, SDTCisInt<1>
 ]>;
@@ -254,6 +258,7 @@
 def br         : SDNode<"ISD::BR"         , SDTBr,     [SDNPHasChain]>;
 def ret        : SDNode<"ISD::RET"        , SDTRet,    [SDNPHasChain]>;
 
+def readport   : SDNode<"ISD::READPORT"   , SDTReadPort,  [SDNPHasChain]>;
 def writeport  : SDNode<"ISD::WRITEPORT"  , SDTWritePort, [SDNPHasChain]>;
 
 def load       : SDNode<"ISD::LOAD"       , SDTLoad,  [SDNPHasChain]>;