[llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td

[Nate Begeman]

Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.28 -> 1.29
---
Log message:

Since extload can also be used by FP, split STDIntExtLoad into two parts,
one for use with extload, one for use with sextload and zextload, which
are integer only.


---
Diffs of the changes:  (+5 -2)

 TargetSelectionDAG.td |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.28 llvm/lib/Target/TargetSelectionDAG.td:1.29
--- llvm/lib/Target/TargetSelectionDAG.td:1.28	Sat Dec 17 14:42:29 2005
+++ llvm/lib/Target/TargetSelectionDAG.td	Sat Dec 17 20:48:48 2005
@@ -149,7 +149,10 @@
   SDTCisPtrTy<1>  
 ]>;
 
-def SDTIntExtLoad : SDTypeProfile<1, 3, [  // sextload, zextload, extload
+def SDTExtLoad : SDTypeProfile<1, 3, [  // extload
+  SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>
+]>;
+def SDTIntExtLoad : SDTypeProfile<1, 3, [  // sextload, zextload
   SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>
 ]>;
 def SDTTruncStore : SDTypeProfile<0, 4, [  // truncstore
@@ -263,7 +266,7 @@
 // below) which pass in a dummy srcvalue node which tblgen will skip over.
 def sextld     : SDNode<"ISD::SEXTLOAD"   , SDTIntExtLoad, [SDNPHasChain]>;
 def zextld     : SDNode<"ISD::ZEXTLOAD"   , SDTIntExtLoad, [SDNPHasChain]>;
-def extld      : SDNode<"ISD::EXTLOAD"    , SDTIntExtLoad, [SDNPHasChain]>;
+def extld      : SDNode<"ISD::EXTLOAD"    , SDTExtLoad,    [SDNPHasChain]>;
 def truncst    : SDNode<"ISD::TRUNCSTORE" , SDTTruncStore, [SDNPHasChain]>;
 
 //===----------------------------------------------------------------------===//