[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
Chris Lattner
lattner at cs.uiuc.edu
Sat Dec 17 17:41:50 PST 2005
Changes in directory llvm/lib/Target/SparcV8:
SparcV8InstrInfo.td updated: 1.73 -> 1.74
---
Log message:
Add unordered comparisons
---
Diffs of the changes: (+8 -13)
SparcV8InstrInfo.td | 21 ++++++++-------------
1 files changed, 8 insertions(+), 13 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.73 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.74
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.73 Sat Dec 17 19:38:19 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Sat Dec 17 19:41:39 2005
@@ -412,8 +412,6 @@
let isBarrier = 1 in
def BA : BranchV8<0b1000, (ops IntRegs:$dst),
"ba $dst", []>;
-def BN : BranchV8<0b0000, (ops IntRegs:$dst),
- "bn $dst", []>;
def BNE : BranchV8<0b1001, (ops IntRegs:$dst),
"bne $dst",
[(V8bricc IntRegs:$dst, SETNE, ICC)]>;
@@ -455,27 +453,24 @@
let hasDelaySlot = 1;
}
-def FBN : FPBranchV8<0b0000, (ops IntRegs:$dst),
- "fbn $dst",
- []>;
def FBU : FPBranchV8<0b0111, (ops IntRegs:$dst),
"fbu $dst",
- []>;
+ [(V8brfcc IntRegs:$dst, SETUO, FCC)]>;
def FBG : FPBranchV8<0b0110, (ops IntRegs:$dst),
"fbg $dst",
[(V8brfcc IntRegs:$dst, SETGT, FCC)]>;
def FBUG : FPBranchV8<0b0101, (ops IntRegs:$dst),
"fbug $dst",
- []>;
+ [(V8brfcc IntRegs:$dst, SETUGT, FCC)]>;
def FBL : FPBranchV8<0b0100, (ops IntRegs:$dst),
"fbl $dst",
[(V8brfcc IntRegs:$dst, SETLT, FCC)]>;
def FBUL : FPBranchV8<0b0011, (ops IntRegs:$dst),
"fbul $dst",
- []>;
+ [(V8brfcc IntRegs:$dst, SETULT, FCC)]>;
def FBLG : FPBranchV8<0b0010, (ops IntRegs:$dst),
"fblg $dst",
- []>;
+ [(V8brfcc IntRegs:$dst, SETONE, FCC)]>;
def FBNE : FPBranchV8<0b0001, (ops IntRegs:$dst),
"fbne $dst",
[(V8brfcc IntRegs:$dst, SETNE, FCC)]>;
@@ -484,22 +479,22 @@
[(V8brfcc IntRegs:$dst, SETEQ, FCC)]>;
def FBUE : FPBranchV8<0b1010, (ops IntRegs:$dst),
"fbue $dst",
- []>;
+ [(V8brfcc IntRegs:$dst, SETUEQ, FCC)]>;
def FBGE : FPBranchV8<0b1011, (ops IntRegs:$dst),
"fbge $dst",
[(V8brfcc IntRegs:$dst, SETGE, FCC)]>;
def FBUGE: FPBranchV8<0b1100, (ops IntRegs:$dst),
"fbuge $dst",
- []>;
+ [(V8brfcc IntRegs:$dst, SETUGE, FCC)]>;
def FBLE : FPBranchV8<0b1101, (ops IntRegs:$dst),
"fble $dst",
[(V8brfcc IntRegs:$dst, SETLE, FCC)]>;
def FBULE: FPBranchV8<0b1110, (ops IntRegs:$dst),
"fbule $dst",
- []>;
+ [(V8brfcc IntRegs:$dst, SETULE, FCC)]>;
def FBO : FPBranchV8<0b1111, (ops IntRegs:$dst),
"fbo $dst",
- []>;
+ [(V8brfcc IntRegs:$dst, SETO, FCC)]>;
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