[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8InstrInfo.td updated: 1.68 -> 1.69
---
Log message:

Add patterns for fround/fextend and the funny fsmuld instruction


---
Diffs of the changes:  (+8 -4)

 SparcV8InstrInfo.td |   12 ++++++++----
 1 files changed, 8 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.68 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.69
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.68	Sat Dec 17 17:10:46 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Sat Dec 17 17:14:30 2005
@@ -501,10 +501,12 @@
 // Convert between Floating-point Formats Instructions, p. 143
 def FSTOD : F3_3<2, 0b110100, 0b011001001, 
                  (ops DFPRegs:$dst, FPRegs:$src),
-                 "fstod $src, $dst", []>;
+                 "fstod $src, $dst",
+                 [(set DFPRegs:$dst, (fextend FPRegs:$src))]>;
 def FDTOS : F3_3<2, 0b110100, 0b011000110,
                  (ops FPRegs:$dst, DFPRegs:$src),
-                 "fdtos $src, $dst", []>;
+                 "fdtos $src, $dst",
+                 [(set FPRegs:$dst, (fround DFPRegs:$src))]>;
 
 // Floating-point Move Instructions, p. 144
 def FMOVS : F3_3<2, 0b110100, 0b000000001,
@@ -546,11 +548,13 @@
                   [(set DFPRegs:$dst, (fmul DFPRegs:$src1, DFPRegs:$src2))]>;
 def FSMULD : F3_3<2, 0b110100, 0b001101001,
                   (ops DFPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
-                  "fsmuld $src1, $src2, $dst", []>;
+                  "fsmuld $src1, $src2, $dst",
+                  [(set DFPRegs:$dst, (fmul (fextend FPRegs:$src1),
+                                            (fextend FPRegs:$src2)))]>;
 def FDIVS  : F3_3<2, 0b110100, 0b001001101,
                  (ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
                  "fdivs $src1, $src2, $dst",
-                 [(set DFPRegs:$dst, (fdiv FPRegs:$src1, FPRegs:$src2))]>;
+                 [(set FPRegs:$dst, (fdiv FPRegs:$src1, FPRegs:$src2))]>;
 def FDIVD  : F3_3<2, 0b110100, 0b001001110,
                  (ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
                  "fdivd $src1, $src2, $dst",