[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8InstrInfo.td updated: 1.62 -> 1.63
---
Log message:

add andn/orn/xorn patterns.  This allows us to compile this:

long %test(ubyte, short, long %X, long %Y) {
  %A = xor long %X, -1
  %B = and long %Y, %A
  ret long %B
}

to this:

test:
        save -96, %sp, %sp
        andn %i4, %i2, %i0
        andn %i5, %i3, %i1
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        xor %i2, -1, %l0
        xor %i3, -1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

The simpleisel emits:  :(

test:
        save -96, %sp, %sp
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l1
        xor %i2, %l0, %l0
        xor %i3, %l1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop


---
Diffs of the changes:  (+6 -3)

 SparcV8InstrInfo.td |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.62 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.63
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.62	Sat Dec 17 14:47:16 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Sat Dec 17 15:05:49 2005
@@ -250,7 +250,8 @@
                    "andcc $b, $c, $dst", []>;
 def ANDNrr  : F3_1<2, 0b000101,
                    (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
-                   "andn $b, $c, $dst", []>;
+                   "andn $b, $c, $dst",
+                   [(set IntRegs:$dst, (and IntRegs:$b, (not IntRegs:$c)))]>;
 def ANDNri  : F3_2<2, 0b000101,
                    (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
                    "andn $b, $c, $dst", []>;
@@ -276,7 +277,8 @@
                    "orcc $b, $c, $dst", []>;
 def ORNrr   : F3_1<2, 0b000110,
                    (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
-                   "orn $b, $c, $dst", []>;
+                   "orn $b, $c, $dst",
+                   [(set IntRegs:$dst, (or IntRegs:$b, (not IntRegs:$c)))]>;
 def ORNri   : F3_2<2, 0b000110,
                    (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
                    "orn $b, $c, $dst", []>;
@@ -302,7 +304,8 @@
                    "xorcc $b, $c, $dst", []>;
 def XNORrr  : F3_1<2, 0b000111,
                    (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
-                   "xnor $b, $c, $dst", []>;
+                   "xnor $b, $c, $dst",
+                   [(set IntRegs:$dst, (xor IntRegs:$b, (not IntRegs:$c)))]>;
 def XNORri  : F3_2<2, 0b000111,
                    (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
                    "xnor $b, $c, $dst", []>;