[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8ISelDAGToDAG.cpp updated: 1.5 -> 1.6
---
Log message:

Add support for 64-bit arguments


---
Diffs of the changes:  (+12 -0)

 SparcV8ISelDAGToDAG.cpp |   12 ++++++++++++
 1 files changed, 12 insertions(+)


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.5 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.6
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.5	Sat Dec 17 14:50:42 2005
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Sat Dec 17 14:59:06 2005
@@ -102,6 +102,18 @@
         Arg = DAG.getNode(ISD::TRUNCATE, ObjectVT, Arg);
       }
       ArgValues.push_back(Arg);
+      break;
+    }
+    case MVT::i64: {
+      unsigned VRegLo = RegMap->createVirtualRegister(&V8::IntRegsRegClass);
+      MF.addLiveIn(GPR[ArgNo++], VRegLo);
+      unsigned VRegHi = RegMap->createVirtualRegister(&V8::IntRegsRegClass);
+      MF.addLiveIn(GPR[ArgNo++], VRegHi);
+      SDOperand ArgLo = DAG.getCopyFromReg(DAG.getRoot(), VRegLo, MVT::i32);
+      SDOperand ArgHi = DAG.getCopyFromReg(ArgLo.getValue(1), VRegHi, MVT::i32);
+      DAG.setRoot(ArgHi.getValue(1));
+      ArgValues.push_back(DAG.getNode(ISD::BUILD_PAIR, MVT::i64, ArgLo, ArgHi));
+      break;
     }
     }
   }