[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td

Chris Lattner lattner at cs.uiuc.edu
Sat Dec 17 12:44:47 PST 2005



Changes in directory llvm/lib/Target/SparcV8:

SparcV8InstrInfo.td updated: 1.60 -> 1.61
---
Log message:

Add [reg+reg] integer stores


---
Diffs of the changes:  (+15 -0)

 SparcV8InstrInfo.td |   15 +++++++++++++++
 1 files changed, 15 insertions(+)


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.60 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.61
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.60	Sat Dec 17 14:42:55 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Sat Dec 17 14:44:36 2005
@@ -173,18 +173,33 @@
                   [(set DFPRegs:$dst, (load ADDRri:$addr))]>;
 
 // Section B.4 - Store Integer Instructions, p. 95
+def STBrr : F3_1<3, 0b000101,
+                 (ops MEMrr:$addr, IntRegs:$src),
+                 "stb $src, [$addr]",
+                 [(truncstore IntRegs:$src, ADDRrr:$addr, i8)]>;
 def STBri : F3_2<3, 0b000101,
                  (ops MEMri:$addr, IntRegs:$src),
                  "stb $src, [$addr]",
                  [(truncstore IntRegs:$src, ADDRri:$addr, i8)]>;
+def STHrr : F3_1<3, 0b000110,
+                 (ops MEMrr:$addr, IntRegs:$src),
+                 "sth $src, [$addr]",
+                 [(truncstore IntRegs:$src, ADDRrr:$addr, i16)]>;
 def STHri : F3_2<3, 0b000110,
                  (ops MEMri:$addr, IntRegs:$src),
                  "sth $src, [$addr]",
                  [(truncstore IntRegs:$src, ADDRri:$addr, i16)]>;
+def STrr  : F3_1<3, 0b000100,
+                 (ops MEMrr:$addr, IntRegs:$src),
+                 "st $src, [$addr]",
+                 [(store IntRegs:$src, ADDRrr:$addr)]>;
 def STri  : F3_2<3, 0b000100,
                  (ops MEMri:$addr, IntRegs:$src),
                  "st $src, [$addr]",
                  [(store IntRegs:$src, ADDRri:$addr)]>;
+def STDrr : F3_1<3, 0b000111,
+                 (ops MEMrr:$addr, IntRegs:$src),
+                 "std $src, [$addr]", []>;
 def STDri : F3_2<3, 0b000111,
                  (ops MEMri:$addr, IntRegs:$src),
                  "std $src, [$addr]", []>;






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