[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8InstrInfo.td updated: 1.52 -> 1.53
---
Log message:

Add shift and small immediate support


---
Diffs of the changes:  (+20 -6)

 SparcV8InstrInfo.td |   26 ++++++++++++++++++++------
 1 files changed, 20 insertions(+), 6 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.52 llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.53
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.52	Sat Dec 17 12:53:33 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td	Sat Dec 17 13:07:57 2005
@@ -250,22 +250,28 @@
 // Section B.12 - Shift Instructions, p. 107
 def SLLrr : F3_1<2, 0b100101,
                  (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
-                 "sll $b, $c, $dst", []>;
+                 "sll $b, $c, $dst",
+                 [(set IntRegs:$dst, (shl IntRegs:$b, IntRegs:$c))]>;
 def SLLri : F3_2<2, 0b100101,
                  (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
-                 "sll $b, $c, $dst", []>;
+                 "sll $b, $c, $dst",
+                 [(set IntRegs:$dst, (shl IntRegs:$b, simm13:$c))]>;
 def SRLrr : F3_1<2, 0b100110, 
                  (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
-                  "srl $b, $c, $dst", []>;
+                  "srl $b, $c, $dst",
+                  [(set IntRegs:$dst, (srl IntRegs:$b, IntRegs:$c))]>;
 def SRLri : F3_2<2, 0b100110,
                  (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
-                 "srl $b, $c, $dst", []>;
+                 "srl $b, $c, $dst", 
+                 [(set IntRegs:$dst, (srl IntRegs:$b, simm13:$c))]>;
 def SRArr : F3_1<2, 0b100111, 
                  (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
-                  "sra $b, $c, $dst", []>;
+                  "sra $b, $c, $dst",
+                  [(set IntRegs:$dst, (sra IntRegs:$b, IntRegs:$c))]>;
 def SRAri : F3_2<2, 0b100111,
                  (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
-                 "sla $b, $c, $dst", []>;
+                 "sra $b, $c, $dst",
+                 [(set IntRegs:$dst, (sra IntRegs:$b, simm13:$c))]>;
 
 // Section B.13 - Add Instructions, p. 108
 def ADDrr   : F3_1<2, 0b000000, 
@@ -556,3 +562,11 @@
 def FCMPED : F3_3<2, 0b110101, 0b001010110,
                   (ops DFPRegs:$src1, DFPRegs:$src2),
                   "fcmped $src1, $src2\n\tnop">;
+
+//===----------------------------------------------------------------------===//
+// Non-Instruction Patterns
+//===----------------------------------------------------------------------===//
+
+// Small immediates.
+def : Pat<(i32 simm13:$val),
+          (ORri G0, imm:$val)>;