[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h

[Evan Cheng]

Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.7 -> 1.8
X86ISelLowering.h updated: 1.2 -> 1.3
---
Log message:

X86 lowers SELECT to a cmp / test followed by a conditional move.


---
Diffs of the changes:  (+29 -1)

 X86ISelLowering.cpp |   22 ++++++++++++++++++++++
 X86ISelLowering.h   |    8 +++++++-
 2 files changed, 29 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.7 llvm/lib/Target/X86/X86ISelLowering.cpp:1.8
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.7	Thu Dec 15 13:49:23 2005
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Fri Dec 16 19:21:05 2005
@@ -113,6 +113,11 @@
   // These should be promoted to a larger select which is supported.
   setOperationAction(ISD::SELECT           , MVT::i1   , Promote);
   setOperationAction(ISD::SELECT           , MVT::i8   , Promote);
+  // X86 wants to expand cmov itself.
+  if (X86DAGIsel) {
+    setOperationAction(ISD::SELECT         , MVT::i16  , Custom);
+    setOperationAction(ISD::SELECT         , MVT::i32  , Custom);
+  }
 
   // We don't have line number support yet.
   setOperationAction(ISD::LOCATION, MVT::Other, Expand);
@@ -930,5 +935,22 @@
     Tys.push_back(MVT::Other);
     return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops);
   }
+  case ISD::SELECT: {
+    unsigned Opc;
+    SDOperand Cond  = Op.getOperand(0);
+    SDOperand True  = Op.getOperand(1);
+    SDOperand False = Op.getOperand(2);
+    SDOperand CC;
+    if (Cond.getOpcode() == ISD::SETCC) {
+      CC = Cond.getOperand(2);
+      Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
+                         Cond.getOperand(0), Cond.getOperand(1));
+    } else {
+      CC = DAG.getCondCode(ISD::SETEQ);
+      Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Cond, Cond);
+    }
+    return DAG.getNode(X86ISD::CMOV, Op.getValueType(),
+                       Op.getOperand(1), Op.getOperand(2), CC, Cond);
+  }
   }
 }


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.2 llvm/lib/Target/X86/X86ISelLowering.h:1.3
--- llvm/lib/Target/X86/X86ISelLowering.h:1.2	Sun Nov 20 15:41:10 2005
+++ llvm/lib/Target/X86/X86ISelLowering.h	Fri Dec 16 19:21:05 2005
@@ -23,7 +23,7 @@
   namespace X86ISD {
     enum NodeType {
       // Start the numbering where the builtin ops leave off.
-      FIRST_NUMBER = ISD::BUILTIN_OP_END,
+      FIRST_NUMBER = ISD::BUILTIN_OP_END+X86::INSTRUCTION_LIST_END,
 
       /// FILD64m - This instruction implements SINT_TO_FP with a
       /// 64-bit source in memory and a FP reg result.  This corresponds to
@@ -66,6 +66,12 @@
       /// RDTSC_DAG - This operation implements the lowering for 
       /// readcyclecounter
       RDTSC_DAG,
+
+      /// X86 compare and logical compare instructions.
+      CMP, TEST,
+
+      /// X86 conditional moves.
+      CMOV,
     };
   }