[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Chris Lattner
lattner at cs.uiuc.edu
Thu Dec 15 11:02:49 PST 2005
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.68 -> 1.69
---
Log message:
Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support
if after legalize. This fixes IA64 failures.
---
Diffs of the changes: (+4 -2)
DAGCombiner.cpp | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.68 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.69
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.68 Wed Dec 14 13:25:30 2005
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Dec 15 13:02:38 2005
@@ -1550,7 +1550,8 @@
return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, N0.getOperand(0),
DAG.getValueType(N0.getValueType()));
// fold (sext (load x)) -> (sext (truncate (sextload x)))
- if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse()) {
+ if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse() &&
+ (!AfterLegalize||TLI.isOperationLegal(ISD::SEXTLOAD, N0.getValueType()))){
SDOperand ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, N0.getOperand(0),
N0.getOperand(1), N0.getOperand(2),
N0.getValueType());
@@ -1592,7 +1593,8 @@
(!AfterLegalize || TLI.isOperationLegal(ISD::AND, N0.getValueType())))
return DAG.getZeroExtendInReg(N0.getOperand(0), N0.getValueType());
// fold (zext (load x)) -> (zext (truncate (zextload x)))
- if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse()) {
+ if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse() &&
+ (!AfterLegalize||TLI.isOperationLegal(ISD::ZEXTLOAD, N0.getValueType()))){
SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, N0.getOperand(0),
N0.getOperand(1), N0.getOperand(2),
N0.getValueType());
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