[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrFormats.td PPCInstrInfo.td

[Nate Begeman]

Changes in directory llvm/lib/Target/PowerPC:

PPCInstrFormats.td updated: 1.61 -> 1.62
PPCInstrInfo.td updated: 1.156 -> 1.157
---
Log message:

Add support for fmul node of type v4f32.

void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

Is selected to:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v0, v0, v0, v1
        stvx v0, r2, r3
        blr


---
Diffs of the changes:  (+21 -0)

 PPCInstrFormats.td |    8 ++++++++
 PPCInstrInfo.td    |   13 +++++++++++++
 2 files changed, 21 insertions(+)


Index: llvm/lib/Target/PowerPC/PPCInstrFormats.td
diff -u llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.61 llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.62
--- llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.61	Fri Dec  9 17:54:17 2005
+++ llvm/lib/Target/PowerPC/PPCInstrFormats.td	Tue Dec 13 18:34:09 2005
@@ -602,6 +602,14 @@
   let Inst{21-31} = xo;
 }
 
+class VXForm_setzero<bits<11> xo, dag OL, string asmstr,
+               InstrItinClass itin, list<dag> pattern>
+    : VXForm_1<xo, OL, asmstr, itin, pattern> {
+  let VA = VD;
+  let VB = VD;
+}
+
+
 class VXForm_2<bits<11> xo, dag OL, string asmstr,
                InstrItinClass itin, list<dag> pattern>
     : I<4, OL, asmstr, itin> {


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.156 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.157
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.156	Tue Dec 13 16:55:22 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td	Tue Dec 13 18:34:09 2005
@@ -897,6 +897,16 @@
 def VSUBFP : VXForm_1<74, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
                       "vsubfp $vD, $vA, $vB", VecFP,
                       [(set VRRC:$vD, (fsub VRRC:$vA, VRRC:$vB))]>;
+def VXOR : VXForm_1<1220, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+                      "vxor $vD, $vA, $vB", VecFP,
+                      []>;
+                      
+// VX-Form Pseudo Instructions
+
+def V_SET0 : VXForm_setzero<1220, (ops VRRC:$vD),
+                      "vxor $vD, $vD, $vD", VecFP,
+                      []>;
+
 
 //===----------------------------------------------------------------------===//
 // PowerPC Instruction Patterns
@@ -951,6 +961,9 @@
 def : Pat<(add GPRC:$in, (PPChi tconstpool:$g, 0)),
           (ADDIS GPRC:$in, tconstpool:$g)>;
 
+def : Pat<(fmul VRRC:$vA, VRRC:$vB),
+          (VMADDFP VRRC:$vA, (V_SET0), VRRC:$vB)>; 
+
 // Fused multiply add and multiply sub for packed float.  These are represented
 // separately from the real instructions above, for operations that must have
 // the additional precision, such as Newton-Rhapson (used by divide, sqrt)