[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h

[Evan Cheng]

Changes in directory llvm/include/llvm/CodeGen:

SelectionDAG.h updated: 1.75 -> 1.76
---
Log message:

Added support for ComplexPattern. These are patterns that require C++ pattern
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.


---
Diffs of the changes:  (+49 -10)

 SelectionDAG.h |   59 +++++++++++++++++++++++++++++++++++++++++++++++----------
 1 files changed, 49 insertions(+), 10 deletions(-)


Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.75 llvm/include/llvm/CodeGen/SelectionDAG.h:1.76
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.75	Wed Nov 30 18:18:45 2005
+++ llvm/include/llvm/CodeGen/SelectionDAG.h	Wed Dec  7 20:00:35 2005
@@ -327,16 +327,6 @@
                           SDOperand Op1, SDOperand Op2) {
     return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2);
   }
-  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
-                          MVT::ValueType VT2, SDOperand Op1, SDOperand Op2) {
-    std::vector<MVT::ValueType> ResultTys;
-    ResultTys.push_back(VT1);
-    ResultTys.push_back(VT2);
-    std::vector<SDOperand> Ops;
-    Ops.push_back(Op1);
-    Ops.push_back(Op2);
-    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
-  }
   SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT,
                           SDOperand Op1, SDOperand Op2, SDOperand Op3) {
     return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3);
@@ -355,6 +345,55 @@
                           std::vector<SDOperand> &Ops) {
     return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops);
   }
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+                          MVT::ValueType VT2, SDOperand Op1, SDOperand Op2) {
+    std::vector<MVT::ValueType> ResultTys;
+    ResultTys.push_back(VT1);
+    ResultTys.push_back(VT2);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Op1);
+    Ops.push_back(Op2);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+  }
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+                          MVT::ValueType VT2, SDOperand Op1, SDOperand Op2,
+                          SDOperand Op3) {
+    std::vector<MVT::ValueType> ResultTys;
+    ResultTys.push_back(VT1);
+    ResultTys.push_back(VT2);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Op1);
+    Ops.push_back(Op2);
+    Ops.push_back(Op3);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+  }
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+                          MVT::ValueType VT2, SDOperand Op1, SDOperand Op2,
+                          SDOperand Op3, SDOperand Op4) {
+    std::vector<MVT::ValueType> ResultTys;
+    ResultTys.push_back(VT1);
+    ResultTys.push_back(VT2);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Op1);
+    Ops.push_back(Op2);
+    Ops.push_back(Op3);
+    Ops.push_back(Op4);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+  }
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+                          MVT::ValueType VT2, SDOperand Op1, SDOperand Op2,
+                          SDOperand Op3, SDOperand Op4, SDOperand Op5) {
+    std::vector<MVT::ValueType> ResultTys;
+    ResultTys.push_back(VT1);
+    ResultTys.push_back(VT2);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Op1);
+    Ops.push_back(Op2);
+    Ops.push_back(Op3);
+    Ops.push_back(Op4);
+    Ops.push_back(Op5);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+  }
   SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1, 
                           MVT::ValueType VT2, std::vector<SDOperand> &Ops) {
     std::vector<MVT::ValueType> ResultTys;