[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp AlphaInstrInfo.td
Andrew Lenharth
alenhar2 at cs.uiuc.edu
Tue Dec 6 15:28:02 PST 2005
Changes in directory llvm/lib/Target/Alpha:
AlphaISelDAGToDAG.cpp updated: 1.14 -> 1.15
AlphaInstrInfo.td updated: 1.80 -> 1.81
---
Log message:
fix divide and remainder
---
Diffs of the changes: (+14 -13)
AlphaISelDAGToDAG.cpp | 24 +++++++++++-------------
AlphaInstrInfo.td | 3 +++
2 files changed, 14 insertions(+), 13 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.14 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.15
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.14 Tue Dec 6 14:43:30 2005
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Tue Dec 6 17:27:39 2005
@@ -339,19 +339,17 @@
}
SDOperand Tmp1 = Select(N->getOperand(0)),
Tmp2 = Select(N->getOperand(1)),
- Addr = CurDAG->getExternalSymbol(opstr, AlphaLowering.getPointerTy());
- SDOperand Tmp3 = Select(Addr);
- SDOperand Chain = CurDAG->getCopyToReg(CurDAG->getRoot(), Alpha::R24,
- Tmp1, SDOperand());
- Chain = CurDAG->getCopyToReg(CurDAG->getRoot(), Alpha::R25,
- Tmp2, Chain.getValue(1));
- Chain = CurDAG->getCopyToReg(CurDAG->getRoot(), Alpha::R27,
- Tmp3, Chain.getValue(1));
- Chain = CurDAG->getTargetNode(Alpha::JSRs, MVT::i64, MVT::Flag,
- CurDAG->getRegister(Alpha::R27, MVT::i64),
- getI64Imm(0));
- return CurDAG->getCopyFromReg(Chain.getValue(1), Alpha::R27, MVT::i64,
- Chain.getValue(1));
+ Addr = Select(CurDAG->getExternalSymbol(opstr,
+ AlphaLowering.getPointerTy()));
+ SDOperand Chain;
+ Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), Alpha::R24, Tmp1,
+ SDOperand(0,0));
+ Chain = CurDAG->getCopyToReg(Chain, Alpha::R25, Tmp2, Chain.getValue(1));
+ Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, Addr, Chain.getValue(1));
+ Chain = CurDAG->getTargetNode(Alpha::JSRsDAG, MVT::Other, MVT::Flag,
+ Chain, Chain.getValue(1));
+ return CurDAG->getCopyFromReg(Chain, Alpha::R27, MVT::i64,
+ Chain.getValue(1));
}
break;
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.80 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.81
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.80 Mon Dec 5 18:33:53 2005
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Tue Dec 6 17:27:39 2005
@@ -429,6 +429,9 @@
let isCall = 1, Defs = [R24, R25, R27, R28], Uses = [R24, R25] in
def JSRs : MbrForm< 0x1A, 0x01, (ops GPRC:$RD, GPRC:$RS, s14imm:$DISP), "jsr $RD,($RS),$DISP">; //Jump to div or rem
+let isCall = 1, Defs = [R23, R24, R25, R27, R28], Uses = [R24, R25, R27] in
+ def JSRsDAG : MbrForm< 0x1A, 0x01, (ops ), "jsr $$23,($$27),0">; //Jump to div or rem
+
def JSR_COROUTINE : MbrForm< 0x1A, 0x03, (ops GPRC:$RD, GPRC:$RS, s14imm:$DISP), "jsr_coroutine $RD,($RS),$DISP">; //Jump to subroutine return
def BR : BForm<0x30, "br $RA,$DISP">; //Branch
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