[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrFormats.td AlphaInstrInfo.td
Andrew Lenharth
alenhar2 at cs.uiuc.edu
Mon Dec 5 16:34:05 PST 2005
Changes in directory llvm/lib/Target/Alpha:
AlphaInstrFormats.td updated: 1.16 -> 1.17
AlphaInstrInfo.td updated: 1.79 -> 1.80
---
Log message:
added instructions with inverted immediates
---
Diffs of the changes: (+23 -32)
AlphaInstrFormats.td | 18 +-----------------
AlphaInstrInfo.td | 37 ++++++++++++++++++++++---------------
2 files changed, 23 insertions(+), 32 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaInstrFormats.td
diff -u llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.16 llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.17
--- llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.16 Mon Dec 5 17:19:44 2005
+++ llvm/lib/Target/Alpha/AlphaInstrFormats.td Mon Dec 5 18:33:53 2005
@@ -155,23 +155,7 @@
let Inst{4-0} = Rc;
}
-class OForm4<bits<6> opcode, bits<7> fun, string asmstr>
- : InstAlpha<opcode, (ops GPRC:$RDEST, GPRC:$RSRC2, GPRC:$RSRC, GPRC:$RCOND), asmstr> {
- bits<5> Rc;
- bits<5> Rb;
- bits<5> Ra;
- bits<7> Function = fun;
-
- let isTwoAddress = 1;
- let Inst{25-21} = Ra;
- let Inst{20-16} = Rb;
- let Inst{15-13} = 0;
- let Inst{12} = 0;
- let Inst{11-5} = Function;
- let Inst{4-0} = Rc;
-}
-
-class OForm4A<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern>
+class OForm4<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern>
: InstAlphaAlt<opcode, asmstr> {
let Pattern = pattern;
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.79 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.80
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.79 Mon Dec 5 17:41:45 2005
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Mon Dec 5 18:33:53 2005
@@ -35,12 +35,19 @@
//********************
//Paterns for matching
//********************
-
+def invX : SDNodeXForm<imm, [{
+ return getI64Imm(~N->getValue());
+}]>;
def immUExt8 : PatLeaf<(imm), [{
// immUExt8 predicate - True if the immediate fits in a 8-bit zero extended
// field. Used by instructions like 'addi'.
return (unsigned long)N->getValue() == (unsigned char)N->getValue();
}]>;
+def immUExt8inv : PatLeaf<(imm), [{
+ // immUExt8inv predicate - True if the inverted immediate fits in a 8-bit zero extended
+ // field. Used by instructions like 'ornoti'.
+ return (unsigned long)~N->getValue() == (unsigned char)~N->getValue();
+}], invX>;
def immSExt16 : PatLeaf<(imm), [{
// immSExt16 predicate - True if the immediate fits in a 16-bit sign extended
// field. Used by instructions like 'lda'.
@@ -160,21 +167,21 @@
def CMOVNEi : OForm4L< 0x11, 0x26, "cmovne $RCOND,$L,$RDEST">; //CMOVE if RCOND != zero
let OperandList = (ops GPRC:$RDEST, GPRC:$RTRUE, GPRC:$RFALSE, GPRC:$RCOND) in {
-def CMOVLBC : OForm4A< 0x11, 0x16, "cmovlbc $RCOND,$RFALSE,$RDEST",
+def CMOVLBC : OForm4< 0x11, 0x16, "cmovlbc $RCOND,$RFALSE,$RDEST",
[(set GPRC:$RDEST, (select (xor GPRC:$RCOND, 1), GPRC:$RTRUE, GPRC:$RFALSE))]>;
-def CMOVLBS : OForm4A< 0x11, 0x14, "cmovlbs $RCOND,$RFALSE,$RDEST",
+def CMOVLBS : OForm4< 0x11, 0x14, "cmovlbs $RCOND,$RFALSE,$RDEST",
[(set GPRC:$RDEST, (select (and GPRC:$RCOND, 1), GPRC:$RTRUE, GPRC:$RFALSE))]>;
-def CMOVEQ : OForm4A< 0x11, 0x24, "cmoveq $RCOND,$RFALSE,$RDEST",
+def CMOVEQ : OForm4< 0x11, 0x24, "cmoveq $RCOND,$RFALSE,$RDEST",
[(set GPRC:$RDEST, (select (seteq GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>;
-def CMOVGE : OForm4A< 0x11, 0x46, "cmovge $RCOND,$RFALSE,$RDEST",
+def CMOVGE : OForm4< 0x11, 0x46, "cmovge $RCOND,$RFALSE,$RDEST",
[(set GPRC:$RDEST, (select (setge GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>;
-def CMOVGT : OForm4A< 0x11, 0x66, "cmovgt $RCOND,$RFALSE,$RDEST",
+def CMOVGT : OForm4< 0x11, 0x66, "cmovgt $RCOND,$RFALSE,$RDEST",
[(set GPRC:$RDEST, (select (setgt GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>;
-def CMOVLE : OForm4A< 0x11, 0x64, "cmovle $RCOND,$RFALSE,$RDEST",
+def CMOVLE : OForm4< 0x11, 0x64, "cmovle $RCOND,$RFALSE,$RDEST",
[(set GPRC:$RDEST, (select (setlt GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>;
-def CMOVLT : OForm4A< 0x11, 0x44, "cmovlt $RCOND,$RFALSE,$RDEST",
+def CMOVLT : OForm4< 0x11, 0x44, "cmovlt $RCOND,$RFALSE,$RDEST",
[(set GPRC:$RDEST, (select (setlt GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>;
-def CMOVNE : OForm4A< 0x11, 0x26, "cmovne $RCOND,$RFALSE,$RDEST",
+def CMOVNE : OForm4< 0x11, 0x26, "cmovne $RCOND,$RFALSE,$RDEST",
[(set GPRC:$RDEST, (select (setne GPRC:$RCOND, 0), GPRC:$RTRUE, GPRC:$RFALSE))]>;
}
@@ -199,8 +206,8 @@
[(set GPRC:$RC, (and GPRC:$RA, immUExt8:$L))]>;
def BIC : OForm< 0x11, 0x08, "bic $RA,$RB,$RC",
[(set GPRC:$RC, (and GPRC:$RA, (not GPRC:$RB)))]>;
-def BICi : OFormL<0x11, 0x08, "bic $RA,$L,$RC", []>;
-// [(set GPRC:$RC, (and GPRC:$RA, (not immUExt8:$L)))]>; //FIXME?
+def BICi : OFormL<0x11, 0x08, "bic $RA,$L,$RC",
+ [(set GPRC:$RC, (and GPRC:$RA, immUExt8inv:$L))]>;
def BIS : OForm< 0x11, 0x20, "bis $RA,$RB,$RC",
[(set GPRC:$RC, (or GPRC:$RA, GPRC:$RB))]>;
def BISi : OFormL<0x11, 0x20, "bis $RA,$L,$RC",
@@ -213,8 +220,8 @@
[(set GPRC:$RC, (cttz GPRC:$RB))]>;
def EQV : OForm< 0x11, 0x48, "eqv $RA,$RB,$RC",
[(set GPRC:$RC, (xor GPRC:$RA, (not GPRC:$RB)))]>;
-def EQVi : OFormL<0x11, 0x48, "eqv $RA,$L,$RC", []>;
-// [(set GPRC:$RC, (xor GPRC:$RA, (not immUExt8:$L)))]>;
+def EQVi : OFormL<0x11, 0x48, "eqv $RA,$L,$RC",
+ [(set GPRC:$RC, (xor GPRC:$RA, immUExt8inv:$L))]>;
//def EXTBL : OForm< 0x12, 0x06, "EXTBL $RA,$RB,$RC", []>; //Extract byte low
//def EXTBLi : OFormL<0x12, 0x06, "EXTBL $RA,$L,$RC", []>; //Extract byte low
//def EXTLH : OForm< 0x12, 0x6A, "EXTLH $RA,$RB,$RC", []>; //Extract longword high
@@ -270,8 +277,8 @@
[(set GPRC:$RC, (mul GPRC:$RA, immUExt8:$L))]>;
def ORNOT : OForm< 0x11, 0x28, "ornot $RA,$RB,$RC",
[(set GPRC:$RC, (or GPRC:$RA, (not GPRC:$RB)))]>;
-def ORNOTi : OFormL<0x11, 0x28, "ornot $RA,$L,$RC", []>;
-// [(set GPRC:$RC, (or GPRC:$RA, (not immUExt8:$L)))]>;
+def ORNOTi : OFormL<0x11, 0x28, "ornot $RA,$L,$RC",
+ [(set GPRC:$RC, (or GPRC:$RA, immUExt8inv:$L))]>;
def S4ADDL : OForm< 0x10, 0x02, "s4addl $RA,$RB,$RC",
[(set GPRC:$RC, (intop (add4 GPRC:$RA, GPRC:$RB)))]>;
def S4ADDLi : OFormL<0x10, 0x02, "s4addl $RA,$L,$RC",
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