[llvm-commits] CVS: llvm/lib/Target/Skeleton/SkeletonRegisterInfo.td

[Nate Begeman]

Changes in directory llvm/lib/Target/Skeleton:

SkeletonRegisterInfo.td updated: 1.5 -> 1.6
---
Log message:

Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work.  This change has no effect on generated code.


---
Diffs of the changes:  (+2 -2)

 SkeletonRegisterInfo.td |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/Skeleton/SkeletonRegisterInfo.td
diff -u llvm/lib/Target/Skeleton/SkeletonRegisterInfo.td:1.5 llvm/lib/Target/Skeleton/SkeletonRegisterInfo.td:1.6
--- llvm/lib/Target/Skeleton/SkeletonRegisterInfo.td:1.5	Fri Sep 30 01:43:58 2005
+++ llvm/lib/Target/Skeleton/SkeletonRegisterInfo.td	Wed Nov 30 22:51:06 2005
@@ -89,10 +89,10 @@
 
 /// Register classes: one for floats and another for non-floats.
 ///
-def GPRC : RegisterClass<"Skeleton", i32, 32, [R0, R1, R2, R3, R4, R5, R6, R7,
+def GPRC : RegisterClass<"Skeleton", [i32], 32, [R0, R1, R2, R3, R4, R5, R6, R7,
   R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21,
   R22, R23, R24, R25, R26, R27, R28, R29, R30, R31]>;
-def FPRC : RegisterClass<"Skeleton", f64, 64, [F0, F1, F2, F3, F4, F5, F6, F7,
+def FPRC : RegisterClass<"Skeleton", [f64], 64, [F0, F1, F2, F3, F4, F5, F6, F7,
   F8, F9, F10, F11, F12, F13, F14, F15, F16, F17, F18, F19, F20, F21,
   F22, F23, F24, F25, F26, F27, F28, F29, F30, F31]>;