[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h X86ISelPattern.cpp X86InstrInfo.td

[Andrew Lenharth]

Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.1 -> 1.2
X86ISelLowering.h updated: 1.1 -> 1.2
X86ISelPattern.cpp updated: 1.185 -> 1.186
X86InstrInfo.td updated: 1.139 -> 1.140
---
Log message:

The second patch of X86 support for read cycle counter.

---
Diffs of the changes:  (+20 -0)

 X86ISelLowering.cpp |    7 +++++++
 X86ISelLowering.h   |    4 ++++
 X86ISelPattern.cpp  |    5 +++++
 X86InstrInfo.td     |    4 ++++
 4 files changed, 20 insertions(+)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.1 llvm/lib/Target/X86/X86ISelLowering.cpp:1.2
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.1	Mon Nov 14 18:40:24 2005
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Sun Nov 20 15:41:10 2005
@@ -101,6 +101,7 @@
   setOperationAction(ISD::CTPOP            , MVT::i32  , Expand);
   setOperationAction(ISD::CTTZ             , MVT::i32  , Expand);
   setOperationAction(ISD::CTLZ             , MVT::i32  , Expand);
+  setOperationAction(ISD::READCYCLECOUNTER , MVT::i64  , Custom);
 
   setOperationAction(ISD::READIO           , MVT::i1   , Expand);
   setOperationAction(ISD::READIO           , MVT::i8   , Expand);
@@ -912,5 +913,11 @@
     return DAG.getLoad(Op.getValueType(), FIST, StackSlot,
                        DAG.getSrcValue(NULL));
   }
+  case ISD::READCYCLECOUNTER: {
+    SDOperand rd = DAG.getNode(X86ISD::RDTSC_DAG, MVT::Other, Op.getOperand(0));
+    SDOperand Lo = DAG.getCopyFromReg(rd, X86::EAX, MVT::i32);
+    SDOperand Hi = DAG.getCopyFromReg(rd, X86::EDX, MVT::i32);
+    return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, Lo, Hi);
+  }
   }
 }


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.1 llvm/lib/Target/X86/X86ISelLowering.h:1.2
--- llvm/lib/Target/X86/X86ISelLowering.h:1.1	Mon Nov 14 18:40:24 2005
+++ llvm/lib/Target/X86/X86ISelLowering.h	Sun Nov 20 15:41:10 2005
@@ -62,6 +62,10 @@
       /// LLVM.
       CALL,
       TAILCALL,
+      
+      /// RDTSC_DAG - This operation implements the lowering for 
+      /// readcyclecounter
+      RDTSC_DAG,
     };
   }
 


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.185 llvm/lib/Target/X86/X86ISelPattern.cpp:1.186
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.185	Mon Nov 14 18:40:24 2005
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Sun Nov 20 15:41:10 2005
@@ -3090,6 +3090,11 @@
   default:
     Node->dump(); std::cerr << "\n";
     assert(0 && "Node not handled yet!");
+  case X86ISD::RDTSC_DAG:
+    Select(Node->getOperand(0)); //Chain
+    BuildMI(BB, X86::RDTSC, 0);
+    return;
+
   case ISD::EntryToken: return;  // Noop
   case ISD::TokenFactor:
     if (Node->getNumOperands() == 2) {


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.139 llvm/lib/Target/X86/X86InstrInfo.td:1.140
--- llvm/lib/Target/X86/X86InstrInfo.td:1.139	Sat Nov 19 01:01:30 2005
+++ llvm/lib/Target/X86/X86InstrInfo.td	Sun Nov 20 15:41:10 2005
@@ -167,6 +167,10 @@
 def PHI : I<0, Pseudo, (ops variable_ops), "PHINODE">;        // PHI node.
 def NOOP : I<0x90, RawFrm, (ops), "nop">; // nop
 
+//FIXME: encode this correctly
+let Defs = [EAX, EDX] in
+  def RDTSC : I<0, Pseudo, (ops ), "rdtsc">; //in binary, this inst is 0x0f 0x31
+
 def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm:$amt), "#ADJCALLSTACKDOWN">;
 def ADJCALLSTACKUP   : I<0, Pseudo, (ops i32imm:$amt1, i32imm:$amt2),
                          "#ADJCALLSTACKUP">;