[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Andrew Lenharth
alenhar2 at cs.uiuc.edu
Fri Nov 11 14:49:07 PST 2005
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.98 -> 1.99
---
Log message:
added a chain output
---
Diffs of the changes: (+10 -2)
SelectionDAGISel.cpp | 12 ++++++++++--
1 files changed, 10 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.98 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.99
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.98 Fri Nov 11 10:46:18 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Nov 11 16:48:54 2005
@@ -804,9 +804,17 @@
DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Tmp));
return 0;
}
- case Intrinsic::readcyclecounter:
- setValue(&I, DAG.getNode(ISD::READCYCLECOUNTER, MVT::i64, getRoot()));
+ case Intrinsic::readcyclecounter: {
+ std::vector<MVT::ValueType> VTs;
+ VTs.push_back(MVT::i64);
+ VTs.push_back(MVT::Other);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(getRoot());
+ SDOperand Tmp = DAG.getNode(ISD::READCYCLECOUNTER, VTs, Ops);
+ setValue(&I, Tmp);
+ DAG.setRoot(Tmp.getValue(1));
return 0;
+ }
case Intrinsic::cttz:
setValue(&I, DAG.getNode(ISD::CTTZ,
getValue(I.getOperand(1)).getValueType(),
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