[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC.td

Chris Lattner lattner at cs.uiuc.edu
Sun Oct 23 15:08:25 PDT 2005



Changes in directory llvm/lib/Target/PowerPC:

PPC.td updated: 1.7 -> 1.8
---
Log message:

rearrange things a bit so that instructions can use subtarget features in the
future.


---
Diffs of the changes:  (+9 -11)

 PPC.td |   20 +++++++++-----------
 1 files changed, 9 insertions(+), 11 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC.td
diff -u llvm/lib/Target/PowerPC/PPC.td:1.7 llvm/lib/Target/PowerPC/PPC.td:1.8
--- llvm/lib/Target/PowerPC/PPC.td:1.7	Sun Oct 23 00:28:51 2005
+++ llvm/lib/Target/PowerPC/PPC.td	Sun Oct 23 17:08:13 2005
@@ -16,16 +16,6 @@
 include "../Target.td"
 
 //===----------------------------------------------------------------------===//
-// Register File Description
-//===----------------------------------------------------------------------===//
-
-include "PPCRegisterInfo.td"
-include "PPCSchedule.td"
-include "PPCInstrInfo.td"
-
-
-
-//===----------------------------------------------------------------------===//
 // PowerPC Subtarget features.
 //
  
@@ -41,7 +31,15 @@
                                         "Enable the fsqrt instruction">; 
 
 //===----------------------------------------------------------------------===//
-// PowerPC chips sets supported.
+// Register File Description
+//===----------------------------------------------------------------------===//
+
+include "PPCRegisterInfo.td"
+include "PPCSchedule.td"
+include "PPCInstrInfo.td"
+
+//===----------------------------------------------------------------------===//
+// PowerPC processors supported.
 //
 
 def : Processor<"generic", G3Itineraries, []>;






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