[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Chris Lattner
lattner at cs.uiuc.edu
Sat Oct 15 15:06:30 PDT 2005
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.105 -> 1.106
---
Log message:
Remove some dead code: the ORI/ORIS cases are autogen'd. This makes
SelectIntImmediateExpr dead.
---
Diffs of the changes: (+1 -42)
PPCISelDAGToDAG.cpp | 43 +------------------------------------------
1 files changed, 1 insertion(+), 42 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.105 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.106
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.105 Sat Oct 15 16:44:56 2005
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Sat Oct 15 17:06:18 2005
@@ -63,10 +63,6 @@
// target-specific node if it hasn't already been changed.
SDOperand Select(SDOperand Op);
- SDNode *SelectIntImmediateExpr(SDOperand LHS, SDOperand RHS,
- unsigned OCHi, unsigned OCLo,
- bool IsArithmetic = false,
- bool Negate = false);
SDNode *SelectBitfieldInsert(SDNode *N);
/// SelectCC - Select a comparison of the specified values with the
@@ -393,38 +389,6 @@
return 0;
}
-// SelectIntImmediateExpr - Choose code for integer operations with an immediate
-// operand.
-SDNode *PPC32DAGToDAGISel::SelectIntImmediateExpr(SDOperand LHS, SDOperand RHS,
- unsigned OCHi, unsigned OCLo,
- bool IsArithmetic,
- bool Negate) {
- // Check to make sure this is a constant.
- ConstantSDNode *CN = dyn_cast<ConstantSDNode>(RHS);
- // Exit if not a constant.
- if (!CN) return 0;
- // Extract immediate.
- unsigned C = (unsigned)CN->getValue();
- // Negate if required (ISD::SUB).
- if (Negate) C = -C;
- // Get the hi and lo portions of constant.
- unsigned Hi = IsArithmetic ? HA16(C) : Hi16(C);
- unsigned Lo = Lo16(C);
-
- // If two instructions are needed and usage indicates it would be better to
- // load immediate into a register, bail out.
- if (Hi && Lo && CN->use_size() > 2) return false;
-
- // Select the first operand.
- SDOperand Opr0 = Select(LHS);
-
- if (Lo) // Add in the lo-part.
- Opr0 = CurDAG->getTargetNode(OCLo, MVT::i32, Opr0, getI32Imm(Lo));
- if (Hi) // Add in the hi-part.
- Opr0 = CurDAG->getTargetNode(OCHi, MVT::i32, Opr0, getI32Imm(Hi));
- return Opr0.Val;
-}
-
/// SelectAddr - Given the specified address, return the two operands for a
/// load/store instruction, and return true if it should be an indexed [r+r]
/// operation.
@@ -1237,11 +1201,6 @@
case ISD::OR:
if (SDNode *I = SelectBitfieldInsert(N))
return CodeGenMap[Op] = SDOperand(I, 0);
-
- if (SDNode *I = SelectIntImmediateExpr(N->getOperand(0),
- N->getOperand(1),
- PPC::ORIS, PPC::ORI))
- return CodeGenMap[Op] = SDOperand(I, 0);
// Other cases are autogenerated.
break;
@@ -1279,7 +1238,7 @@
case ISD::FNEG: {
SDOperand Val = Select(N->getOperand(0));
MVT::ValueType Ty = N->getValueType(0);
- if (Val.Val->hasOneUse()) {
+ if (N->getOperand(0).Val->hasOneUse()) {
unsigned Opc;
switch (Val.isTargetOpcode() ? Val.getTargetOpcode() : 0) {
default: Opc = 0; break;
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