[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.24 -> 1.25
---
Log message:

Add ISD::ADD to MaskedValueIsZero


---
Diffs of the changes:  (+8 -0)

 DAGCombiner.cpp |    8 ++++++++
 1 files changed, 8 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.24 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.25
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.24	Sun Oct  9 17:59:08 2005
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Mon Oct 10 11:51:40 2005
@@ -215,6 +215,14 @@
       return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
     }
     return false;
+  case ISD::ADD:
+    // (add X, Y) & C == 0 iff (X&C)&(Y&C) == 0 and all bits are low bits.
+    if ((Mask&(Mask+1)) == 0) {  // All low bits
+      if (MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
+          MaskedValueIsZero(Op.getOperand(1), Mask, TLI))
+        return true;
+    }
+    break;
   case ISD::SUB:
     if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
       // We know that the top bits of C-X are clear if X contains less bits