[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp AlphaRegisterInfo.h
Chris Lattner
sabre at nondot.org
Sun Oct 9 14:58:07 PDT 2005
On Sun, 9 Oct 2005, Chris Lattner wrote:
> On Sun, 9 Oct 2005, Andrew Lenharth wrote:
>
>> This seems useful from the original patch that added the function. If
>> there is a reason it is not useful on a RISC type target, let me know and I
>> will pull it out
>
> Sounds good. All targets should implement it if they can. It improves spill
> code generation.
Note, something else worth implementing is
MRegisterInfo::foldMemoryOperand. In particular, folding a load/store is
possible for copy instructions: turning it into a or load/store :).
If you're interested, see PPC as an example.
-Chris
>> ---
>> Diffs of the changes: (+21 -0)
>>
>> AlphaRegisterInfo.cpp | 19 +++++++++++++++++++
>> AlphaRegisterInfo.h | 2 ++
>> 2 files changed, 21 insertions(+)
>>
>>
>> Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
>> diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.27
>> llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.28
>> --- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.27 Thu Sep 29 20:29:42
>> 2005
>> +++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Sun Oct 9 15:11:35
>> 2005
>> @@ -107,6 +107,25 @@
>> abort();
>> }
>>
>> +unsigned
>> +AlphaRegisterInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex)
>> const
>> +{
>> + switch (MI->getOpcode()) {
>> + case Alpha::LDL:
>> + case Alpha::LDQ:
>> + case Alpha::LDBU:
>> + case Alpha::LDWU:
>> + case Alpha::LDS:
>> + case Alpha::LDT:
>> + if (MI->getOperand(1).isFrameIndex()) {
>> + FrameIndex = MI->getOperand(1).getFrameIndex();
>> + return MI->getOperand(0).getReg();
>> + }
>> + break;
>> + }
>> + return 0;
>> +}
>> +
>> void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
>> MachineBasicBlock::iterator MI,
>> unsigned DestReg, unsigned SrcReg,
>>
>>
>> Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.h
>> diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.6
>> llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.7
>> --- llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.6 Thu Sep 29 20:29:42
>> 2005
>> +++ llvm/lib/Target/Alpha/AlphaRegisterInfo.h Sun Oct 9 15:11:35 2005
>> @@ -34,6 +34,8 @@
>> MachineBasicBlock::iterator MBBI,
>> unsigned DestReg, int FrameIndex,
>> const TargetRegisterClass *RC) const;
>> +
>> + virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex)
>> const;
>>
>> void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator
>> MBBI,
>> unsigned DestReg, unsigned SrcReg,
>>
>>
>>
>> _______________________________________________
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>> llvm-commits at cs.uiuc.edu
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>>
>
> -Chris
>
>
-Chris
--
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