[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Chris Lattner
lattner at cs.uiuc.edu
Sat Oct 8 22:59:08 PDT 2005
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.34 -> 1.35
---
Log message:
When emiting a CopyFromReg and the source is already a vreg, do not bother
creating a new vreg and inserting a copy: just use the input vreg directly.
This speeds up the compile (e.g. about 5% on mesa with a debug build of llc)
by not adding a bunch of copies and vregs to be coallesced away. On mesa,
for example, this reduces the number of intervals from 168601 to 129040
going into the coallescer.
---
Diffs of the changes: (+31 -27)
ScheduleDAG.cpp | 58 +++++++++++++++++++++++++++++---------------------------
1 files changed, 31 insertions(+), 27 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.34 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.35
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.34 Tue Oct 4 11:41:51 2005
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Sun Oct 9 00:58:56 2005
@@ -1025,22 +1025,23 @@
}
case ISD::CopyFromReg: {
unsigned SrcReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
-
- // Figure out the register class to create for the destreg.
- const TargetRegisterClass *TRC = 0;
if (MRegisterInfo::isVirtualRegister(SrcReg)) {
- TRC = RegMap->getRegClass(SrcReg);
- } else {
- // Pick the register class of the right type that contains this physreg.
- for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
- E = MRI.regclass_end(); I != E; ++I)
- if ((*I)->getType() == Node->getValueType(0) &&
- (*I)->contains(SrcReg)) {
- TRC = *I;
- break;
- }
- assert(TRC && "Couldn't find register class for reg copy!");
+ VRBase = SrcReg; // Just use the input register directly!
+ break;
}
+
+ // Figure out the register class to create for the destreg.
+ const TargetRegisterClass *TRC = 0;
+
+ // Pick the register class of the right type that contains this physreg.
+ for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
+ E = MRI.regclass_end(); I != E; ++I)
+ if ((*I)->getType() == Node->getValueType(0) &&
+ (*I)->contains(SrcReg)) {
+ TRC = *I;
+ break;
+ }
+ assert(TRC && "Couldn't find register class for reg copy!");
// Create the reg, emit the copy.
VRBase = RegMap->createVirtualRegister(TRC);
@@ -1206,21 +1207,24 @@
EmitDAG(Op.getOperand(0)); // Emit the chain.
unsigned SrcReg = cast<RegisterSDNode>(Op.getOperand(1))->getReg();
+ // If the input is already a virtual register, just use it.
+ if (MRegisterInfo::isVirtualRegister(SrcReg)) {
+ ResultReg = SrcReg;
+ break;
+ }
+
// Figure out the register class to create for the destreg.
const TargetRegisterClass *TRC = 0;
- if (MRegisterInfo::isVirtualRegister(SrcReg)) {
- TRC = RegMap->getRegClass(SrcReg);
- } else {
- // Pick the register class of the right type that contains this physreg.
- for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
- E = MRI.regclass_end(); I != E; ++I)
- if ((*I)->getType() == Op.Val->getValueType(0) &&
- (*I)->contains(SrcReg)) {
- TRC = *I;
- break;
- }
- assert(TRC && "Couldn't find register class for reg copy!");
- }
+
+ // Pick the register class of the right type that contains this physreg.
+ for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
+ E = MRI.regclass_end(); I != E; ++I)
+ if ((*I)->getType() == Op.Val->getValueType(0) &&
+ (*I)->contains(SrcReg)) {
+ TRC = *I;
+ break;
+ }
+ assert(TRC && "Couldn't find register class for reg copy!");
// Create the reg, emit the copy.
ResultReg = RegMap->createVirtualRegister(TRC);
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