[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Chris Lattner
lattner at cs.uiuc.edu
Tue Oct 4 23:11:19 PDT 2005
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.15 -> 1.16
---
Log message:
Implement the code for PowerPC/inverted-bool-compares.ll, even though it
that testcase still does not pass with the dag combiner. This is because
not all forms of br* are folded yet.
Also, when we combine a node into another one, delete the node immediately
instead of waiting for the node to potentially come up in the future.
---
Diffs of the changes: (+16 -1)
DAGCombiner.cpp | 17 ++++++++++++++++-
1 files changed, 16 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.15 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.16
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.15 Tue Oct 4 23:45:43 2005
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Oct 5 01:11:08 2005
@@ -313,6 +313,9 @@
// Nodes can end up on the worklist more than once. Make sure we do
// not process a node that has been replaced.
removeFromWorkList(N);
+
+ // Finally, since the node is now dead, remove it from the graph.
+ DAG.DeleteNode(N);
}
}
}
@@ -1546,7 +1549,7 @@
ExtDstTy),
Cond);
}
-
+
uint64_t MinVal, MaxVal;
unsigned OperandBitSize = MVT::getSizeInBits(N1C->getValueType(0));
if (ISD::isSignedIntSetCC(Cond)) {
@@ -1682,6 +1685,18 @@
}
}
+ // Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0. Common for condcodes.
+ if (N0.getOpcode() == ISD::XOR)
+ if (ConstantSDNode *XORC = dyn_cast<ConstantSDNode>(N0.getOperand(1)))
+ if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N1)) {
+ // If we know that all of the inverted bits are zero, don't bother
+ // performing the inversion.
+ if (MaskedValueIsZero(N0.getOperand(0), ~XORC->getValue(), TLI))
+ return DAG.getSetCC(VT, N0.getOperand(0),
+ DAG.getConstant(XORC->getValue()^RHSC->getValue(),
+ N0.getValueType()), Cond);
+ }
+
// Simplify (X+Z) == X --> Z == 0
if (N0.getOperand(0) == N1)
return DAG.getSetCC(VT, N0.getOperand(1),
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