[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h

[Chris Lattner]

Changes in directory llvm/include/llvm/Target:

MRegisterInfo.h updated: 1.62 -> 1.63
---
Log message:

Expose the actual valuetype of each register class


---
Diffs of the changes:  (+8 -2)

 MRegisterInfo.h |   10 ++++++++--
 1 files changed, 8 insertions(+), 2 deletions(-)


Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.62 llvm/include/llvm/Target/MRegisterInfo.h:1.63
--- llvm/include/llvm/Target/MRegisterInfo.h:1.62	Fri Sep 30 12:47:48 2005
+++ llvm/include/llvm/Target/MRegisterInfo.h	Sun Oct  2 01:23:19 2005
@@ -17,6 +17,7 @@
 #define LLVM_TARGET_MREGISTERINFO_H
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/Codegen/ValueTypes.h"
 #include <cassert>
 #include <functional>
 
@@ -44,13 +45,18 @@
   typedef const unsigned* const_iterator;
 
 private:
+  MVT::ValueType VT;
   const unsigned RegSize, Alignment;    // Size & Alignment of register in bytes
   const iterator RegsBegin, RegsEnd;
 public:
-  TargetRegisterClass(unsigned RS, unsigned Al, iterator RB, iterator RE)
-    : RegSize(RS), Alignment(Al), RegsBegin(RB), RegsEnd(RE) {}
+  TargetRegisterClass(MVT::ValueType vt, unsigned RS, unsigned Al, iterator RB, iterator RE)
+    : VT(vt), RegSize(RS), Alignment(Al), RegsBegin(RB), RegsEnd(RE) {}
   virtual ~TargetRegisterClass() {}     // Allow subclasses
 
+  /// getType - Return the declared value type for this register class.
+  ///
+  MVT::ValueType getType() const { return VT; }
+  
   // begin/end - Return all of the registers in this class.
   iterator       begin() const { return RegsBegin; }
   iterator         end() const { return RegsEnd; }