[llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp

[Chris Lattner]

Changes in directory llvm/utils/TableGen:

RegisterInfoEmitter.cpp updated: 1.30 -> 1.31
---
Log message:

allow regs to be in multiple reg classes


---
Diffs of the changes:  (+2 -18)

 RegisterInfoEmitter.cpp |   20 ++------------------
 1 files changed, 2 insertions(+), 18 deletions(-)


Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.30 llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.31
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.30	Fri Aug 19 15:23:42 2005
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp	Thu Sep 29 20:33:48 2005
@@ -101,8 +101,6 @@
   const std::vector<CodeGenRegisterClass> &RegisterClasses =
     Target.getRegisterClasses();
 
-  std::set<Record*> RegistersFound;
-
   // Loop over all of the register classes... emitting each one.
   OS << "namespace {     // Register classes...\n";
 
@@ -121,10 +119,6 @@
        << "[] = {\n    ";
     for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
       Record *Reg = RC.Elements[i];
-      if (RegistersFound.count(Reg))
-        throw "Register '" + Reg->getName() +
-              "' included in multiple register classes!";
-      RegistersFound.insert(Reg);
       OS << getQualifiedName(Reg) << ", ";
 
       // Keep track of which regclasses this register is in.
@@ -232,18 +226,8 @@
     unsigned SpillAlign = Reg.DeclaredSpillAlignment;
     for (; I != E; ++I) {   // For each reg class this belongs to.
       const CodeGenRegisterClass *RC = I->second;
-      if (SpillSize == 0)
-        SpillSize = RC->SpillSize;
-      else if (SpillSize != RC->SpillSize)
-        throw "Spill size for regclass '" + RC->getName() +
-              "' doesn't match spill sized already inferred for register '" +
-              Reg.getName() + "'!";
-      if (SpillAlign == 0)
-        SpillAlign = RC->SpillAlignment;
-      else if (SpillAlign != RC->SpillAlignment)
-        throw "Spill alignment for regclass '" + RC->getName() +
-              "' doesn't match spill sized already inferred for register '" +
-              Reg.getName() + "'!";
+      SpillSize = std::max(SpillSize, RC->SpillSize);
+      SpillAlign = std::max(SpillAlign, RC->SpillAlignment);
     }
 
     OS << SpillSize << ", " << SpillAlign << " },\n";