[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPCInstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PowerPCInstrInfo.td updated: 1.111 -> 1.112
---
Log message:

now that tblgen is smarter, this pattern is not needed.  Also, tblgen
now inverts commuted versions of ANDC/ORC with the current .td file.


---
Diffs of the changes:  (+1 -3)

 PowerPCInstrInfo.td |    4 +---
 1 files changed, 1 insertion(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PowerPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.111 llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.112
--- llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.111	Wed Sep 28 18:07:13 2005
+++ llvm/lib/Target/PowerPC/PowerPCInstrInfo.td	Thu Sep 29 14:29:15 2005
@@ -802,11 +802,9 @@
               (NOR GPRC:$in, GPRC:$in)>;
 
 // EQV patterns
+// FIXME: This should be autogenerated from the above due to xor association.
 def EQV1 : Pat<(xor (not GPRC:$in1), GPRC:$in2),
                (EQV GPRC:$in1, GPRC:$in2)>;
-// FIXME: This should be autogenerated from the above due to xor commutativity.
-def EQV2 : Pat<(xor GPRC:$in1, (not GPRC:$in2)),
-               (EQV GPRC:$in1, GPRC:$in2)>;
 
 // ADD an arbitrary immediate.
 def : Pat<(add GPRC:$in, imm:$imm),