[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp PowerPCSubtarget.cpp PowerPCSubtarget.h

Chris Lattner lattner at cs.uiuc.edu
Fri Sep 2 11:33:16 PDT 2005



Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelLowering.cpp updated: 1.20 -> 1.21
PowerPCSubtarget.cpp updated: 1.4 -> 1.5
PowerPCSubtarget.h updated: 1.3 -> 1.4
---
Log message:

Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.
Remove the -enable-gpopt option which is subsumed by feature flags.



---
Diffs of the changes:  (+8 -8)

 PPC32ISelLowering.cpp |    2 +-
 PowerPCSubtarget.cpp  |   11 ++++-------
 PowerPCSubtarget.h    |    3 +++
 3 files changed, 8 insertions(+), 8 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp:1.20 llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp:1.21
--- llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp:1.20	Thu Sep  1 20:24:55 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp	Fri Sep  2 13:33:05 2005
@@ -54,7 +54,7 @@
   setOperationAction(ISD::SREM , MVT::f32, Expand);
   
   // If we're enabling GP optimizations, use hardware square root
-  if (!TM.getSubtarget<PPCSubtarget>().isGigaProcessor()) {
+  if (!TM.getSubtarget<PPCSubtarget>().hasFSQRT()) {
     setOperationAction(ISD::FSQRT, MVT::f64, Expand);
     setOperationAction(ISD::FSQRT, MVT::f32, Expand);
   }


Index: llvm/lib/Target/PowerPC/PowerPCSubtarget.cpp
diff -u llvm/lib/Target/PowerPC/PowerPCSubtarget.cpp:1.4 llvm/lib/Target/PowerPC/PowerPCSubtarget.cpp:1.5
--- llvm/lib/Target/PowerPC/PowerPCSubtarget.cpp:1.4	Thu Sep  1 16:38:21 2005
+++ llvm/lib/Target/PowerPC/PowerPCSubtarget.cpp	Fri Sep  2 13:33:05 2005
@@ -25,11 +25,10 @@
   PPCTargetArg(cl::desc("Force generation of code for a specific PPC target:"),
                cl::values(
                           clEnumValN(TargetAIX,  "aix", "  Enable AIX codegen"),
-                          clEnumValN(TargetDarwin,"darwin","  Enable Darwin codegen"),
+                          clEnumValN(TargetDarwin,"darwin",
+                                     "  Enable Darwin codegen"),
                           clEnumValEnd),
                cl::location(PPCTarget), cl::init(TargetDefault));
-  cl::opt<bool> EnableGPOPT("enable-gpopt", cl::Hidden,
-                             cl::desc("Enable optimizations for GP cpus"));
 }
 
 enum PowerPCFeature {
@@ -126,7 +125,8 @@
   SubtargetFeatures::Parse(FS, CPU,
                            PowerPCSubTypeKV, PowerPCSubTypeKVSize,
                            PowerPCFeatureKV, PowerPCFeatureKVSize);
-  IsGigaProcessor = (Bits & PowerPCFeatureGPUL) != 0;
+  IsGigaProcessor = (Bits & PowerPCFeatureGPUL ) != 0;
+  HasFSQRT        = (Bits & PowerPCFeatureFSqrt) != 0;
 
   // Set the boolean corresponding to the current target triple, or the default
   // if one cannot be determined, to true.
@@ -140,7 +140,4 @@
     IsDarwin = true;
 #endif
   }
-  
-  // If GP opts are forced on by the commandline, do so now.
-  if (EnableGPOPT) IsGigaProcessor = true;
 }


Index: llvm/lib/Target/PowerPC/PowerPCSubtarget.h
diff -u llvm/lib/Target/PowerPC/PowerPCSubtarget.h:1.3 llvm/lib/Target/PowerPC/PowerPCSubtarget.h:1.4
--- llvm/lib/Target/PowerPC/PowerPCSubtarget.h:1.3	Thu Sep  1 16:38:21 2005
+++ llvm/lib/Target/PowerPC/PowerPCSubtarget.h	Fri Sep  2 13:33:05 2005
@@ -29,6 +29,7 @@
 
   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
   bool IsGigaProcessor;
+  bool HasFSQRT;
   bool IsAIX;
   bool IsDarwin;
 public:
@@ -42,6 +43,8 @@
   /// function for this subtarget.
   unsigned getStackAlignment() const { return StackAlignment; }
 
+  bool hasFSQRT() const { return HasFSQRT; }
+  
   bool isAIX() const { return IsAIX; }
   bool isDarwin() const { return IsDarwin; }
   






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