[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Chris Lattner
lattner at cs.uiuc.edu
Mon Aug 29 18:59:02 PDT 2005
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.19 -> 1.20
---
Log message:
Name this variable to be what it really is!
---
Diffs of the changes: (+4 -4)
ScheduleDAG.cpp | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.19 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.20
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.19 Mon Aug 29 20:57:23 2005
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Mon Aug 29 20:58:51 2005
@@ -205,13 +205,13 @@
Emit(Op.getOperand(i));
break;
case ISD::CopyToReg: {
- SDOperand ChainOp;
+ SDOperand FlagOp;
if (Op.getNumOperands() == 4)
- ChainOp = Op.getOperand(3);
- if (Op.getOperand(0).Val != ChainOp.Val)
+ FlagOp = Op.getOperand(3);
+ if (Op.getOperand(0).Val != FlagOp.Val)
Emit(Op.getOperand(0)); // Emit the chain.
unsigned Val = Emit(Op.getOperand(2));
- if (ChainOp.Val) Emit(ChainOp);
+ if (FlagOp.Val) Emit(FlagOp);
MRI.copyRegToReg(*BB, BB->end(),
cast<RegisterSDNode>(Op.getOperand(1))->getReg(), Val,
RegMap->getRegClass(Val));
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