[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.75 -> 1.76
---
Log message:

Don't copy regs that are only used in the entry block into a vreg.  This 
changes the code generated for:

short %test(short %A) {
  %B = xor short %A, -32768
  ret short %B
}

to:

_test:
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 16, 31
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr




---
Diffs of the changes:  (+9 -3)

 SelectionDAGISel.cpp |   12 +++++++++---
 1 files changed, 9 insertions(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.75 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.76
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.75	Fri Aug 26 15:54:47 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Fri Aug 26 17:49:59 2005
@@ -1077,9 +1077,15 @@
            AI != E; ++AI,++a)
         if (!AI->use_empty()) {
           SDL.setValue(AI, Args[a]);
-          SDOperand Copy =
-            CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
-          UnorderedChains.push_back(Copy);
+          
+          if (IsOnlyUsedInOneBasicBlock(AI) == F.begin()) {
+            // Only used in the entry block, no need to copy it to a vreg for
+            // other blocks.
+          } else {
+            SDOperand Copy =
+              CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
+            UnorderedChains.push_back(Copy);
+          }
         }
     } else {
       // Otherwise, if any argument is only accessed in a single basic block,