[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelDAGToDAG.cpp PPC32ISelPattern.cpp
Chris Lattner
lattner at cs.uiuc.edu
Fri Aug 26 09:39:02 PDT 2005
Changes in directory llvm/lib/Target/PowerPC:
PPC32ISelDAGToDAG.cpp updated: 1.38 -> 1.39
PPC32ISelPattern.cpp updated: 1.167 -> 1.168
---
Log message:
Fix some warnings in an optimized build
---
Diffs of the changes: (+3 -3)
PPC32ISelDAGToDAG.cpp | 4 ++--
PPC32ISelPattern.cpp | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/PowerPC/PPC32ISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelDAGToDAG.cpp:1.38 llvm/lib/Target/PowerPC/PPC32ISelDAGToDAG.cpp:1.39
--- llvm/lib/Target/PowerPC/PPC32ISelDAGToDAG.cpp:1.38 Fri Aug 26 11:36:26 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelDAGToDAG.cpp Fri Aug 26 11:38:51 2005
@@ -896,7 +896,7 @@
unsigned Opc;
switch (N->getValueType(0)) {
- default: assert(0 && "Unknown type to ISD::SDIV"); break;
+ default: assert(0 && "Unknown type to ISD::SDIV");
case MVT::i32: Opc = PPC::DIVW; break;
case MVT::f32: Opc = PPC::FDIVS; break;
case MVT::f64: Opc = PPC::FDIV; break;
@@ -1135,7 +1135,7 @@
SDOperand LHSH = Select(N->getOperand(1));
unsigned Imm;
- bool ME, ZE;
+ bool ME = false, ZE = false;
if (isIntImmediate(N->getOperand(3), Imm)) {
ME = (signed)Imm == -1;
ZE = Imm == 0;
Index: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.167 llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.168
--- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.167 Thu Aug 25 19:52:45 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp Fri Aug 26 11:38:51 2005
@@ -1414,7 +1414,7 @@
Tmp2 = SelectExpr(N.getOperand(1));
if (N.getOpcode() == ISD::ADD_PARTS) {
- bool ME, ZE;
+ bool ME = false, ZE = false;
if (isIntImmediate(N.getOperand(3), Tmp3)) {
ME = (signed)Tmp3 == -1;
ZE = Tmp3 == 0;
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