[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp

Chris Lattner lattner at cs.uiuc.edu
Thu Aug 25 15:04:01 PDT 2005



Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelPattern.cpp updated: 1.164 -> 1.165
---
Log message:

Simplify some code.  It's not clear why the UDIV expanded sequence
doesn't work for large uint constants, but we'll keep the current behavior


---
Diffs of the changes:  (+7 -13)

 PPC32ISelPattern.cpp |   20 +++++++-------------
 1 files changed, 7 insertions(+), 13 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.164 llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.165
--- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.164	Thu Aug 25 12:49:31 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp	Thu Aug 25 17:03:50 2005
@@ -1375,29 +1375,23 @@
         BuildMI(BB, PPC::ADDZE, 1, Tmp4).addReg(Tmp1);
         BuildMI(BB, PPC::NEG, 1, Result).addReg(Tmp4);
         return Result;
+      } else if (Tmp3) {
+        ExprMap.erase(N);
+        return SelectExpr(BuildSDIVSequence(N));
       }
     }
     // fall thru
   case ISD::UDIV:
     // If this is a divide by constant, we can emit code using some magic
     // constants to implement it as a multiply instead.
-    if (isIntImmediate(N.getOperand(1), Tmp3)) {
-      if (opcode == ISD::SDIV) {
-        if ((signed)Tmp3 < -1 || (signed)Tmp3 > 1) {
-          ExprMap.erase(N);
-          return SelectExpr(BuildSDIVSequence(N));
-        }
-      } else {
-        if ((signed)Tmp3 > 1) {
-          ExprMap.erase(N);
-          return SelectExpr(BuildUDIVSequence(N));
-        }
-      }
+    if (isIntImmediate(N.getOperand(1), Tmp3) && (signed)Tmp3 > 1) {
+      ExprMap.erase(N);
+      return SelectExpr(BuildUDIVSequence(N));
     }
     Tmp1 = SelectExpr(N.getOperand(0));
     Tmp2 = SelectExpr(N.getOperand(1));
     switch (DestType) {
-    default: assert(0 && "Unknown type to ISD::SDIV"); break;
+    default: assert(0 && "Unknown type to ISD::DIV"); break;
     case MVT::i32: Opc = (ISD::UDIV == opcode) ? PPC::DIVWU : PPC::DIVW; break;
     case MVT::f32: Opc = PPC::FDIVS; break;
     case MVT::f64: Opc = PPC::FDIV; break;






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