[llvm-commits] CVS: llvm/lib/Target/SparcV9/SparcV9RegisterInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV9:

SparcV9RegisterInfo.td updated: 1.4 -> 1.5
---
Log message:

Put register classes into namespaces


---
Diffs of the changes:  (+1 -1)

 SparcV9RegisterInfo.td |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/SparcV9/SparcV9RegisterInfo.td
diff -u llvm/lib/Target/SparcV9/SparcV9RegisterInfo.td:1.4 llvm/lib/Target/SparcV9/SparcV9RegisterInfo.td:1.5
--- llvm/lib/Target/SparcV9/SparcV9RegisterInfo.td:1.4	Mon Sep 13 23:16:49 2004
+++ llvm/lib/Target/SparcV9/SparcV9RegisterInfo.td	Fri Aug 19 13:51:57 2005
@@ -43,7 +43,7 @@
 // FIXME: the register order should be defined in terms of the preferred
 // allocation order...
 //
-def IntRegs : RegisterClass<i64, 64, [G0, G1, G2, G3, G4, G5, G6, G7,
+def IntRegs : RegisterClass<"V9", i64, 64, [G0, G1, G2, G3, G4, G5, G6, G7,
                                      O0, O1, O2, O3, O4, O5, O6, O7,
                                      L0, L1, L2, L3, L4, L5, L6, L7,
                                      I0, I1, I2, I3, I4, I5, I6, I7]>;