[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h

[Chris Lattner]

Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.77 -> 1.78
---
Log message:

Add a new field to TargetInstrDescriptor for tracking information about
operands.


---
Diffs of the changes:  (+15 -0)

 TargetInstrInfo.h |   15 +++++++++++++++
 1 files changed, 15 insertions(+)


Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.77 llvm/include/llvm/Target/TargetInstrInfo.h:1.78
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.77	Thu Apr 21 22:46:24 2005
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Fri Aug 19 11:56:26 2005
@@ -29,6 +29,7 @@
 class Constant;
 class Function;
 class MachineCodeForInstruction;
+class TargetRegisterClass;
 
 //---------------------------------------------------------------------------
 // Data types used to define information about a single machine instruction
@@ -72,6 +73,19 @@
 // before control flow occurs.
 const unsigned M_TERMINATOR_FLAG       = 1 << 12;
 
+/// TargetOperandInfo - This holds information about one operand of a machine
+/// instruction, indicating the register class for register operands, etc.
+///
+class TargetOperandInfo {
+public:
+  /// RegClass - This specifies the register class of the operand if the
+  /// operand is a register.  If not, this contains null.
+  const TargetRegisterClass *RegClass;
+  
+  /// Currently no other information.
+};
+
+
 class TargetInstrDescriptor {
 public:
   const char *    Name;          // Assembly language mnemonic for the opcode.
@@ -87,6 +101,7 @@
   unsigned        TSFlags;       // Target Specific Flag values
   const unsigned *ImplicitUses;  // Registers implicitly read by this instr
   const unsigned *ImplicitDefs;  // Registers implicitly defined by this instr
+  const TargetOperandInfo *OpInfo; // 'numOperands' entries about operands.
 };