[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp PPC32ISelSimple.cpp PPC32RegisterInfo.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelPattern.cpp updated: 1.154 -> 1.155
PPC32ISelSimple.cpp updated: 1.144 -> 1.145
PPC32RegisterInfo.cpp updated: 1.16 -> 1.17
---
Log message:

MFLR doesn't take an operand, the LR register is implicit


---
Diffs of the changes:  (+3 -3)

 PPC32ISelPattern.cpp  |    2 +-
 PPC32ISelSimple.cpp   |    2 +-
 PPC32RegisterInfo.cpp |    2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.154 llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.155
--- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.154	Thu Aug 18 13:58:23 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp	Thu Aug 18 18:24:50 2005
@@ -437,7 +437,7 @@
     MachineBasicBlock::iterator MBBI = FirstMBB.begin();
     GlobalBaseReg = MakeIntReg();
     BuildMI(FirstMBB, MBBI, PPC::MovePCtoLR, 0, PPC::LR);
-    BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg).addReg(PPC::LR);
+    BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg);
     GlobalBaseInitialized = true;
   }
   return GlobalBaseReg;


Index: llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.144 llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.145
--- llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp:1.144	Tue Aug  2 14:25:03 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp	Thu Aug 18 18:24:50 2005
@@ -619,7 +619,7 @@
     MachineBasicBlock::iterator MBBI = FirstMBB.begin();
     GlobalBaseReg = makeAnotherReg(Type::IntTy);
     BuildMI(FirstMBB, MBBI, PPC::MovePCtoLR, 0, PPC::LR);
-    BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg).addReg(PPC::LR);
+    BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg);
     GlobalBaseInitialized = true;
   }
   return GlobalBaseReg;


Index: llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.16 llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.17
--- llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.16	Thu Aug  4 15:49:48 2005
+++ llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp	Thu Aug 18 18:24:50 2005
@@ -83,7 +83,7 @@
   };
   unsigned OC = Opcode[getIdx(getClass(SrcReg))];
   if (SrcReg == PPC::LR) {
-    BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11).addReg(PPC::LR);
+    BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11);
     addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx);
   } else if (PPC32::CRRCRegisterClass == getClass(SrcReg)) {
     BuildMI(MBB, MI, PPC::MFCR, 0, PPC::R11);