[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp

[Chris Lattner]

On Thu, 18 Aug 2005, Chris Lattner wrote:
> On Thu, 18 Aug 2005, Nate Begeman wrote:
>> Fix int foo() { return 65535; } by using the top 16 bits of the 
>> constant
>> as the argument to LIS rather than the result of HA16(constant).
>> 
>> The DAG->DAG ISel was already doing the right thing.
>
> This still doesn't fix it, IIUC.  This will result in 65535 turning into 
> "li 65535" -> "li -1".

Oh I see.  It's using HA16 instead of Hi16, ok. :)

-Chris

>> Diffs of the changes:  (+3 -20)
>> 
>> PPC32ISelPattern.cpp |   23 +++--------------------
>> 1 files changed, 3 insertions(+), 20 deletions(-)
>> 
>> 
>> Index: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
>> diff -u llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.152 
>> llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.153
>> --- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.152	Thu Aug 
>> 18 13:01:39 2005
>> +++ llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp	Thu Aug 18 
>> 13:14:49 2005
>> @@ -246,23 +246,6 @@
>>   return 0;
>> }
>> 
>> -/// getCROpForOp - Return the condition register opcode (or inverted 
>> opcode)
>> -/// associated with the SelectionDAG opcode.
>> -static unsigned getCROpForSetCC(unsigned Opcode, bool Inv1, bool Inv2) 
>> {
>> -  switch (Opcode) {
>> -  default: assert(0 && "Unknown opcode!"); abort();
>> -  case ISD::AND:
>> -    if (Inv1 && Inv2) return PPC::CRNOR; // De Morgan's Law
>> -    if (!Inv1 && !Inv2) return PPC::CRAND;
>> -    if (Inv1 ^ Inv2) return PPC::CRANDC;
>> -  case ISD::OR:
>> -    if (Inv1 && Inv2) return PPC::CRNAND; // De Morgan's Law
>> -    if (!Inv1 && !Inv2) return PPC::CROR;
>> -    if (Inv1 ^ Inv2) return PPC::CRORC;
>> -  }
>> -  return 0;
>> -}
>> -
>> /// getCRIdxForSetCC - Return the index of the condition register field
>> /// associated with the SetCC condition, and whether or not the field 
>> is
>> /// treated as inverted.  That is, lt = 0; ge = 0 inverted.
>> @@ -1735,15 +1718,15 @@
>>   case ISD::Constant: {
>>     assert(N.getValueType() == MVT::i32 &&
>>            "Only i32 constants are legal on this target!");
>> -    int v = (int)cast<ConstantSDNode>(N)->getValue();
>> +    unsigned v = (unsigned)cast<ConstantSDNode>(N)->getValue();
>>     unsigned Hi = HA16(v);
>>     unsigned Lo = Lo16(v);
>>     if (Hi && Lo) {
>>       Tmp1 = MakeIntReg();
>> -      BuildMI(BB, PPC::LIS, 1, Tmp1).addSImm(Hi);
>> +      BuildMI(BB, PPC::LIS, 1, Tmp1).addSImm(v >> 16);
>>       BuildMI(BB, PPC::ORI, 2, Result).addReg(Tmp1).addImm(Lo);
>>     } else if (Hi) {
>> -      BuildMI(BB, PPC::LIS, 1, Result).addSImm(Hi);
>> +      BuildMI(BB, PPC::LIS, 1, Result).addSImm(v >> 16);
>>     } else {
>>       BuildMI(BB, PPC::LI, 1, Result).addSImm(Lo);
>>     }
>> 
>> 
>> 
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>> 
>
> -Chris
>
>

-Chris

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