[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelDAGToDAG.cpp

[Jim Laskey]

It seems to be on by default.  I.E.  if I llc -march=ppc32 it gets  
generated.

-- Jim


On Aug 18, 2005, at 12:33 PM, Chris Lattner wrote:

> On Thu, 18 Aug 2005, Jim Laskey wrote:
>
>> Is there a is implemented on target test for this somewhere?
>>
>
> Yup, in PPC32ISelLowering.cpp, we have this:
>
>   // If we're enabling GP optimizations, use hardware square root
>   if (!TM.getSubtarget<PPCSubtarget>().isGigaProcessor()) {
>     setOperationAction(ISD::FSQRT, MVT::f64, Expand);
>     setOperationAction(ISD::FSQRT, MVT::f32, Expand);
>   }
>
> So the legalizer will take care of the processors that don't have  
> it (expanding to a sqrt[f] call).
>
> -Chris
>
>
>>
>> On Aug 17, 2005, at 9:53 PM, Nate Begeman wrote:
>>
>>
>>> +  case ISD::FSQRT: {
>>> +    MVT::ValueType Ty = N->getValueType(0);
>>> +    CurDAG->SelectNodeTo(N, Ty, Ty == MVT::f64 ? PPC::FSQRT :  
>>> PPC::FSQRTS,
>>> +                         Select(N->getOperand(0)));
>>> +    break;
>>> +  }
>>>
>>
>>
>>
>
> -Chris
>
> -- 
> http://nondot.org/sabre/
> http://llvm.org/
>