[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h SelectionDAGNodes.h
Chris Lattner
lattner at cs.uiuc.edu
Tue Aug 16 14:54:52 PDT 2005
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAG.h updated: 1.38 -> 1.39
SelectionDAGNodes.h updated: 1.50 -> 1.51
---
Log message:
Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)
used to tack a register number onto the node.
Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number. These three operations just become normal
DAG nodes now, instead of requiring special handling.
Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes. The legalizer will not touch them, and this
is bad, so don't do it. :)
---
Diffs of the changes: (+26 -38)
SelectionDAG.h | 34 +++++++++++++++-------------------
SelectionDAGNodes.h | 30 +++++++++++-------------------
2 files changed, 26 insertions(+), 38 deletions(-)
Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.38 llvm/include/llvm/CodeGen/SelectionDAG.h:1.39
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.38 Tue Aug 16 14:49:34 2005
+++ llvm/include/llvm/CodeGen/SelectionDAG.h Tue Aug 16 16:54:41 2005
@@ -101,30 +101,25 @@
SDOperand getBasicBlock(MachineBasicBlock *MBB);
SDOperand getExternalSymbol(const char *Sym, MVT::ValueType VT);
SDOperand getValueType(MVT::ValueType);
+ SDOperand getRegister(unsigned Reg, MVT::ValueType VT);
- SDOperand getCopyToReg(SDOperand Chain, SDOperand N, unsigned Reg) {
- // Note: these are auto-CSE'd because the caller doesn't make requests that
- // could cause duplicates to occur.
- SDNode *NN = new RegSDNode(ISD::CopyToReg, Chain, N, Reg);
- NN->setValueTypes(MVT::Other);
- AllNodes.push_back(NN);
- return SDOperand(NN, 0);
+ SDOperand getCopyToReg(SDOperand Chain, unsigned Reg, SDOperand N) {
+ return getNode(ISD::CopyToReg, MVT::Other, Chain,
+ getRegister(Reg, N.getValueType()), N);
}
- SDOperand getCopyFromReg(unsigned Reg, MVT::ValueType VT, SDOperand Chain) {
- // Note: These nodes are auto-CSE'd by the caller of this method.
- SDNode *NN = new RegSDNode(ISD::CopyFromReg, Chain, Reg);
- NN->setValueTypes(VT, MVT::Other);
- AllNodes.push_back(NN);
- return SDOperand(NN, 0);
+ SDOperand getCopyFromReg(SDOperand Chain, unsigned Reg, MVT::ValueType VT) {
+ std::vector<MVT::ValueType> ResultTys;
+ ResultTys.push_back(VT);
+ ResultTys.push_back(MVT::Other);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(Chain);
+ Ops.push_back(getRegister(Reg, VT));
+ return getNode(ISD::CopyFromReg, ResultTys, Ops);
}
- SDOperand getImplicitDef(SDOperand Chain, unsigned Reg) {
- // Note: These nodes are auto-CSE'd by the caller of this method.
- SDNode *NN = new RegSDNode(ISD::ImplicitDef, Chain, Reg);
- NN->setValueTypes(MVT::Other);
- AllNodes.push_back(NN);
- return SDOperand(NN, 0);
+ SDOperand getImplicitDef(SDOperand Chain, unsigned Reg, MVT::ValueType VT) {
+ return getNode(ISD::ImplicitDef, MVT::Other, Chain, getRegister(Reg, VT));
}
/// getCall - Note that this destroys the vector of RetVals passed in.
@@ -255,6 +250,7 @@
std::map<std::pair<unsigned, std::pair<SDOperand, SDOperand> >,
SDNode *> BinaryOps;
+ std::vector<RegisterSDNode*> RegNodes;
std::vector<CondCodeSDNode*> CondCodeNodes;
std::map<std::pair<SDOperand, std::pair<SDOperand, MVT::ValueType> >,
Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.50 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.51
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.50 Tue Aug 16 14:49:34 2005
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Tue Aug 16 16:54:41 2005
@@ -55,12 +55,10 @@
// Various leaf nodes.
Constant, ConstantFP, GlobalAddress, FrameIndex, ConstantPool,
- BasicBlock, ExternalSymbol, VALUETYPE, CONDCODE,
+ BasicBlock, ExternalSymbol, VALUETYPE, CONDCODE, Register,
- // CopyToReg - This node has chain and child nodes, and an associated
- // register number. The instruction selector must guarantee that the value
- // of the value node is available in the register stored in the RegSDNode
- // object.
+ // CopyToReg - This node has three operands: a chain, a register number to
+ // set to this value, and a value.
CopyToReg,
// CopyFromReg - This node indicates that the input value is a virtual or
@@ -69,10 +67,9 @@
CopyFromReg,
// ImplicitDef - This node indicates that the specified register is
- // implicitly defined by some operation (e.g. its a live-in argument). This
- // register is indicated in the RegSDNode object. The only operand to this
- // is the token chain coming in, the only result is the token chain going
- // out.
+ // implicitly defined by some operation (e.g. its a live-in argument). The
+ // two operands to this are the token chain coming in and the register.
+ // The only result is the token chain going out.
ImplicitDef,
// UNDEF - An undefined node
@@ -830,24 +827,19 @@
};
-class RegSDNode : public SDNode {
+class RegisterSDNode : public SDNode {
unsigned Reg;
protected:
friend class SelectionDAG;
- RegSDNode(unsigned Opc, SDOperand Chain, SDOperand Src, unsigned reg)
- : SDNode(Opc, Chain, Src), Reg(reg) {
- }
- RegSDNode(unsigned Opc, SDOperand Chain, unsigned reg)
- : SDNode(Opc, Chain), Reg(reg) {}
+ RegisterSDNode(unsigned reg, MVT::ValueType VT)
+ : SDNode(ISD::Register, VT), Reg(reg) {}
public:
unsigned getReg() const { return Reg; }
- static bool classof(const RegSDNode *) { return true; }
+ static bool classof(const RegisterSDNode *) { return true; }
static bool classof(const SDNode *N) {
- return N->getOpcode() == ISD::CopyToReg ||
- N->getOpcode() == ISD::CopyFromReg ||
- N->getOpcode() == ISD::ImplicitDef;
+ return N->getOpcode() == ISD::Register;
}
};
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