[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp

Nate Begeman natebegeman at mac.com
Wed Aug 10 13:51:23 PDT 2005



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.156 -> 1.157
SelectionDAG.cpp updated: 1.133 -> 1.134
---
Log message:

Add new node, SELECT_CC.  This node is for targets that don't natively 
implement SELECT.


---
Diffs of the changes:  (+53 -3)

 LegalizeDAG.cpp  |   53 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
 SelectionDAG.cpp |    3 +--
 2 files changed, 53 insertions(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.156 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.157
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.156	Tue Aug  9 15:20:18 2005
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Wed Aug 10 15:51:12 2005
@@ -362,7 +362,7 @@
   std::map<SDOperand, SDOperand>::iterator I = LegalizedNodes.find(Op);
   if (I != LegalizedNodes.end()) return I->second;
 
-  SDOperand Tmp1, Tmp2, Tmp3;
+  SDOperand Tmp1, Tmp2, Tmp3, Tmp4;
 
   SDOperand Result = Op;
 
@@ -911,6 +911,17 @@
 
     switch (TLI.getOperationAction(Node->getOpcode(), Tmp2.getValueType())) {
     default: assert(0 && "This action is not supported yet!");
+    case TargetLowering::Expand:
+      if (Tmp1.getOpcode() == ISD::SETCC) {
+        Result = DAG.getSelectCC(Tmp1.getOperand(0), Tmp1.getOperand(1), 
+                              Tmp2, Tmp3,
+                              cast<CondCodeSDNode>(Tmp1.getOperand(2))->get());
+      } else {
+        Result = DAG.getSelectCC(Tmp1, 
+                                 DAG.getConstant(0, Tmp1.getValueType()),
+                                 Tmp2, Tmp3, ISD::SETNE);
+      }
+      break;
     case TargetLowering::Legal:
       if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
           Tmp3 != Node->getOperand(2))
@@ -938,6 +949,29 @@
     }
     }
     break;
+  case ISD::SELECT_CC:
+    Tmp3 = LegalizeOp(Node->getOperand(2));   // True
+    Tmp4 = LegalizeOp(Node->getOperand(3));   // False
+    
+    if (getTypeAction(Node->getOperand(0).getValueType()) == Legal) {
+      Tmp1 = LegalizeOp(Node->getOperand(0));   // LHS
+      Tmp2 = LegalizeOp(Node->getOperand(1));   // RHS
+      if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
+          Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3)) {
+        Result = DAG.getNode(ISD::SELECT_CC, Node->getValueType(0), Tmp1, Tmp2, 
+                             Tmp3, Tmp4, Node->getOperand(4));
+      }
+      break;
+    } else {
+      Tmp1 = LegalizeOp(DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(),
+                                    Node->getOperand(0),  // LHS
+                                    Node->getOperand(1),  // RHS
+                                    Node->getOperand(4)));
+      Result = DAG.getSelectCC(Tmp1,
+                               DAG.getConstant(0, Tmp1.getValueType()), 
+                               Tmp3, Tmp4, ISD::SETNE);
+    }
+    break;
   case ISD::SETCC:
     switch (getTypeAction(Node->getOperand(0).getValueType())) {
     case Legal:
@@ -1999,6 +2033,13 @@
     Tmp3 = PromoteOp(Node->getOperand(2));   // Legalize the op1
     Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2, Tmp3);
     break;
+  case ISD::SELECT_CC:
+    Tmp2 = PromoteOp(Node->getOperand(2));   // True
+    Tmp3 = PromoteOp(Node->getOperand(3));   // False
+    Result = DAG.getNode(ISD::SELECT_CC, NVT, Node->getOperand(0),
+                         Node->getOperand(1), Tmp2, Tmp3,
+                         Node->getOperand(4));
+    break;
   case ISD::TAILCALL:
   case ISD::CALL: {
     Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.
@@ -2733,6 +2774,16 @@
     Hi = DAG.getNode(ISD::SELECT, NVT, C, LH, RH);
     break;
   }
+  case ISD::SELECT_CC: {
+    SDOperand TL, TH, FL, FH;
+    ExpandOp(Node->getOperand(2), TL, TH);
+    ExpandOp(Node->getOperand(3), FL, FH);
+    Lo = DAG.getNode(ISD::SELECT_CC, NVT, Node->getOperand(0),
+                     Node->getOperand(1), TL, FL, Node->getOperand(4));
+    Hi = DAG.getNode(ISD::SELECT_CC, NVT, Node->getOperand(0),
+                     Node->getOperand(1), TH, FH, Node->getOperand(4));
+    break;
+  }
   case ISD::SIGN_EXTEND: {
     SDOperand In;
     switch (getTypeAction(Node->getOperand(0).getValueType())) {


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.133 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.134
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.133	Wed Aug 10 12:37:53 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Wed Aug 10 15:51:12 2005
@@ -686,8 +686,6 @@
   return SDOperand();
 }
 
-
-
 /// getNode - Gets or creates the specified node.
 ///
 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
@@ -1702,6 +1700,7 @@
 
   case ISD::SETCC:       return "setcc";
   case ISD::SELECT:      return "select";
+  case ISD::SELECT_CC:   return "select_cc";
   case ISD::ADD_PARTS:   return "add_parts";
   case ISD::SUB_PARTS:   return "sub_parts";
   case ISD::SHL_PARTS:   return "shl_parts";






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