[llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt

Chris Lattner lattner at persephone.cs.uiuc.edu
Tue Aug 9 15:31:19 PDT 2005



Changes in directory llvm/lib/Target/PowerPC:

README.txt updated: 1.26 -> 1.27
---
Log message:

add a optimization note


---
Diffs of the changes:  (+18 -0)

 README.txt |   18 ++++++++++++++++++
 1 files changed, 18 insertions


Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.26 llvm/lib/Target/PowerPC/README.txt:1.27
--- llvm/lib/Target/PowerPC/README.txt:1.26	Fri Aug  5 14:18:32 2005
+++ llvm/lib/Target/PowerPC/README.txt	Tue Aug  9 17:30:57 2005
@@ -11,6 +11,24 @@
 * Support 'update' load/store instructions.  These are cracked on the G5, but
   are still a codesize win.
 
+* Add a custom legalizer for the GlobalAddress node, to move the funky darwin
+  stub stuff from the instruction selector to the legalizer (exposing low-level
+  operations to the dag for optzn.  For example, we want to codegen this:
+
+        int A = 0;
+        void B() { A++; }
+  as:
+        lis r9,ha16(_A)
+        lwz r2,lo16(_A)(r9)
+        addi r2,r2,1
+        stw r2,lo16(_A)(r9)
+  not:
+        lis r2, ha16(_A)
+        lwz r2, lo16(_A)(r2)
+        addi r2, r2, 1
+        lis r3, ha16(_A)
+        stw r2, lo16(_A)(r3)
+
 * should hint to the branch select pass that it doesn't need to print the
   second unconditional branch, so we don't end up with things like:
 	b .LBBl42__2E_expand_function_8_674	; loopentry.24






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