[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp PPC32RegisterInfo.td PPC64RegisterInfo.cpp PPC64RegisterInfo.td PowerPC.h PowerPCTargetMachine.cpp

Nate Begeman natebegeman at mac.com
Thu Aug 4 13:49:59 PDT 2005



Changes in directory llvm/lib/Target/PowerPC:

PPC32RegisterInfo.cpp updated: 1.15 -> 1.16
PPC32RegisterInfo.td updated: 1.4 -> 1.5
PPC64RegisterInfo.cpp updated: 1.9 -> 1.10
PPC64RegisterInfo.td updated: 1.3 -> 1.4
PowerPC.h updated: 1.17 -> 1.18
PowerPCTargetMachine.cpp updated: 1.58 -> 1.59
---
Log message:

Use the new subtarget support to automatically choose the correct ABI
and asm printer for PowerPC if one is not specified.


---
Diffs of the changes:  (+35 -18)

 PPC32RegisterInfo.cpp    |    5 -----
 PPC32RegisterInfo.td     |    2 +-
 PPC64RegisterInfo.cpp    |    5 -----
 PPC64RegisterInfo.td     |    2 +-
 PowerPC.h                |    5 +++++
 PowerPCTargetMachine.cpp |   34 ++++++++++++++++++++++++++++------
 6 files changed, 35 insertions(+), 18 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.15 llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.16
--- llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp:1.15	Sat Jul 30 13:33:25 2005
+++ llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp	Thu Aug  4 15:49:48 2005
@@ -31,11 +31,6 @@
 #include <iostream>
 using namespace llvm;
 
-namespace llvm {
-  // Switch toggling compilation for AIX
-  extern cl::opt<bool> AIX;
-}
-
 PPC32RegisterInfo::PPC32RegisterInfo()
   : PPC32GenRegisterInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP) {
   ImmToIdxMap[PPC::LD]   = PPC::LDX;    ImmToIdxMap[PPC::STD]  = PPC::STDX;


Index: llvm/lib/Target/PowerPC/PPC32RegisterInfo.td
diff -u llvm/lib/Target/PowerPC/PPC32RegisterInfo.td:1.4 llvm/lib/Target/PowerPC/PPC32RegisterInfo.td:1.5
--- llvm/lib/Target/PowerPC/PPC32RegisterInfo.td:1.4	Tue Apr 12 02:04:16 2005
+++ llvm/lib/Target/PowerPC/PPC32RegisterInfo.td	Thu Aug  4 15:49:48 2005
@@ -22,7 +22,7 @@
 {
   let Methods = [{
     iterator allocation_order_begin(MachineFunction &MF) const {
-      return begin() + (AIX ? 1 : 0);
+      return begin() + ((TargetAIX == PPCTarget) ? 1 : 0);
     }
     iterator allocation_order_end(MachineFunction &MF) const {
       if (hasFP(MF))


Index: llvm/lib/Target/PowerPC/PPC64RegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPC64RegisterInfo.cpp:1.9 llvm/lib/Target/PowerPC/PPC64RegisterInfo.cpp:1.10
--- llvm/lib/Target/PowerPC/PPC64RegisterInfo.cpp:1.9	Fri Apr 22 12:54:30 2005
+++ llvm/lib/Target/PowerPC/PPC64RegisterInfo.cpp	Thu Aug  4 15:49:48 2005
@@ -31,11 +31,6 @@
 #include <iostream>
 using namespace llvm;
 
-namespace llvm {
-  // Switch toggling compilation for AIX
-  extern cl::opt<bool> AIX;
-}
-
 PPC64RegisterInfo::PPC64RegisterInfo()
   : PPC64GenRegisterInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP) {
   ImmToIdxMap[PPC::LD]   = PPC::LDX;    ImmToIdxMap[PPC::STD]  = PPC::STDX;


Index: llvm/lib/Target/PowerPC/PPC64RegisterInfo.td
diff -u llvm/lib/Target/PowerPC/PPC64RegisterInfo.td:1.3 llvm/lib/Target/PowerPC/PPC64RegisterInfo.td:1.4
--- llvm/lib/Target/PowerPC/PPC64RegisterInfo.td:1.3	Sat Aug 21 15:14:40 2004
+++ llvm/lib/Target/PowerPC/PPC64RegisterInfo.td	Thu Aug  4 15:49:48 2005
@@ -22,7 +22,7 @@
 {
   let Methods = [{
     iterator allocation_order_begin(MachineFunction &MF) const {
-      return begin() + (AIX ? 1 : 0);
+      return begin() + ((TargetAIX == PPCTarget) ? 1 : 0);
     }
     iterator allocation_order_end(MachineFunction &MF) const {
       if (hasFP(MF))


Index: llvm/lib/Target/PowerPC/PowerPC.h
diff -u llvm/lib/Target/PowerPC/PowerPC.h:1.17 llvm/lib/Target/PowerPC/PowerPC.h:1.18
--- llvm/lib/Target/PowerPC/PowerPC.h:1.17	Thu Jul 21 15:44:42 2005
+++ llvm/lib/Target/PowerPC/PowerPC.h	Thu Aug  4 15:49:48 2005
@@ -22,6 +22,10 @@
 class FunctionPass;
 class TargetMachine;
 
+enum PPCTargetEnum {
+  TargetDefault, TargetAIX, TargetDarwin
+};
+
 FunctionPass *createPPCBranchSelectionPass();
 FunctionPass *createPPC32ISelSimple(TargetMachine &TM);
 FunctionPass *createPPC32ISelPattern(TargetMachine &TM);
@@ -31,6 +35,7 @@
 
 extern bool GPOPT;
 extern bool PICEnabled;
+extern PPCTargetEnum PPCTarget;
 } // end namespace llvm;
 
 // GCC #defines PPC on Linux but we use it as our namespace name


Index: llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.58 llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.59
--- llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.58	Thu Aug  4 02:12:08 2005
+++ llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp	Thu Aug  4 15:49:48 2005
@@ -19,6 +19,7 @@
 #include "PPC64JITInfo.h"
 #include "llvm/Module.h"
 #include "llvm/PassManager.h"
+#include "llvm/Analysis/Verifier.h"
 #include "llvm/CodeGen/IntrinsicLowering.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/Passes.h"
@@ -30,11 +31,17 @@
 using namespace llvm;
 
 bool llvm::GPOPT = false;
+PPCTargetEnum llvm::PPCTarget = TargetDefault;
 
 namespace llvm {
-  cl::opt<bool> AIX("aix",
-                    cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
-                    cl::Hidden);
+  cl::opt<PPCTargetEnum, true>
+  PPCTargetArg(
+         cl::desc("Force generation of code for a specific PPC target:"),
+         cl::values(
+                    clEnumValN(TargetAIX,  "aix", "  Enable AIX codegen"),
+                    clEnumValN(TargetDarwin,"darwin","  Enable Darwin codegen"),
+                    clEnumValEnd),
+         cl::location(PPCTarget), cl::init(TargetDefault));
   cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc",
                              cl::desc("Enable LSR for PPC (beta)"),
                              cl::Hidden);
@@ -62,7 +69,12 @@
                                            const Module &M,
                                            const TargetData &TD,
                                            const PowerPCFrameInfo &TFI)
-: TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M) {}
+: TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M) {
+  if (TargetDefault == PPCTarget) {
+    if (Subtarget.IsAIX()) PPCTarget = TargetAIX;
+    if (Subtarget.IsDarwin()) PPCTarget = TargetDarwin;
+  }
+}
 
 unsigned PPC32TargetMachine::getJITMatchQuality() {
 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
@@ -84,6 +96,7 @@
 
   if (EnablePPCLSR) {
     PM.add(createLoopStrengthReducePass());
+    PM.add(createVerifierPass());
     PM.add(createCFGSimplificationPass());
   }
 
@@ -122,10 +135,19 @@
   // Must run branch selection immediately preceding the asm printer
   PM.add(createPPCBranchSelectionPass());
 
-  if (AIX)
+  // Decide which asm printer to use.  If the user has not specified one on
+  // the command line, choose whichever one matches the default (current host).
+  switch (PPCTarget) {
+  case TargetDefault:
+    assert(0 && "Default host has no asm printer!");
+    break;
+  case TargetAIX:
     PM.add(createAIXAsmPrinter(Out, *this));
-  else
+    break;
+  case TargetDarwin:
     PM.add(createDarwinAsmPrinter(Out, *this));
+    break;
+  }
 
   PM.add(createMachineCodeDeleter());
   return false;






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