[llvm-commits] CVS: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp X86ATTAsmPrinter.h X86IntelAsmPrinter.h X86IntelAsmPrinter.cpp

[Nate Begeman]

Changes in directory llvm/lib/Target/X86:

X86ATTAsmPrinter.cpp updated: 1.6 -> 1.7
X86ATTAsmPrinter.h updated: 1.1 -> 1.2
X86IntelAsmPrinter.h updated: 1.1 -> 1.2
X86IntelAsmPrinter.cpp updated: 1.3 -> 1.4
---
Log message:

Add support for printing the sse scalar comparison instruction mnemonics.


---
Diffs of the changes:  (+34 -0)

 X86ATTAsmPrinter.cpp   |   16 ++++++++++++++++
 X86ATTAsmPrinter.h     |    1 +
 X86IntelAsmPrinter.cpp |   16 ++++++++++++++++
 X86IntelAsmPrinter.h   |    1 +
 4 files changed, 34 insertions(+)


Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.6 llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.7
--- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.6	Tue Jul 12 13:34:58 2005
+++ llvm/lib/Target/X86/X86ATTAsmPrinter.cpp	Thu Jul 14 17:52:25 2005
@@ -143,6 +143,22 @@
   }
 }
 
+void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op,
+                                  MVT::ValueType VT) {
+  unsigned char value = MI->getOperand(Op).getImmedValue();
+  assert(value <= 7 && "Invalid ssecc argument!");
+  switch (value) {
+  case 0: O << "eq"; break;
+  case 1: O << "lt"; break;
+  case 2: O << "le"; break;
+  case 3: O << "unord"; break;
+  case 4: O << "neq"; break;
+  case 5: O << "nlt"; break;
+  case 6: O << "nle"; break;
+  case 7: O << "ord"; break;
+  }
+}
+
 void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
   assert(isMem(MI, Op) && "Invalid memory reference!");
 


Index: llvm/lib/Target/X86/X86ATTAsmPrinter.h
diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.1 llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.2
--- llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.1	Fri Jul  1 17:44:09 2005
+++ llvm/lib/Target/X86/X86ATTAsmPrinter.h	Thu Jul 14 17:52:25 2005
@@ -51,6 +51,7 @@
 
   void printMachineInstruction(const MachineInstr *MI);
   void printOp(const MachineOperand &MO, bool isCallOperand = false);
+  void printSSECC(const MachineInstr *MI, unsigned Op, MVT::ValueType VT);
   void printMemReference(const MachineInstr *MI, unsigned Op);
   bool runOnMachineFunction(MachineFunction &F);
 };


Index: llvm/lib/Target/X86/X86IntelAsmPrinter.h
diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.1 llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.2
--- llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.1	Fri Jul  1 17:44:09 2005
+++ llvm/lib/Target/X86/X86IntelAsmPrinter.h	Thu Jul 14 17:52:25 2005
@@ -70,6 +70,7 @@
 
   void printMachineInstruction(const MachineInstr *MI);
   void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
+  void printSSECC(const MachineInstr *MI, unsigned Op, MVT::ValueType VT);
   void printMemReference(const MachineInstr *MI, unsigned Op);
   bool runOnMachineFunction(MachineFunction &F);
   bool doInitialization(Module &M);


Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.3 llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.4
--- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.3	Mon Jul 11 01:25:34 2005
+++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp	Thu Jul 14 17:52:25 2005
@@ -58,6 +58,22 @@
   return false;
 }
 
+void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op,
+                                  MVT::ValueType VT) {
+  unsigned char value = MI->getOperand(Op).getImmedValue();
+  assert(value <= 7 && "Invalid ssecc argument!");
+  switch (value) {
+  case 0: O << "eq"; break;
+  case 1: O << "lt"; break;
+  case 2: O << "le"; break;
+  case 3: O << "unord"; break;
+  case 4: O << "neq"; break;
+  case 5: O << "nlt"; break;
+  case 6: O << "nle"; break;
+  case 7: O << "ord"; break;
+  }
+}
+
 void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
                                  bool elideOffsetKeyword /* = false */) {
   const MRegisterInfo &RI = *TM.getRegisterInfo();